revert to non-vmstate supporting usb-hub.c

[qemu] / hw / smc91c111.c

diff --git a/hw/smc91c111.c b/hw/smc91c111.c
index d90ab32..9c2221a 100644 (file)
--- a/hw/smc91c111.c
+++ b/hw/smc91c111.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * SMSC 91C111 Ethernet interface emulation
  *
  * Copyright (c) 2005 CodeSourcery, LLC.
@@ -7,7 +7,9 @@
  * This code is licenced under the GPL
  */
 
-#include "vl.h"
+#include "hw.h"
+#include "net.h"
+#include "devices.h"
 /* For crc32 */
 #include <zlib.h>
 
@@ -15,7 +17,6 @@
 #define NUM_PACKETS 4
 
 typedef struct {
-    uint32_t base;
     VLANClientState *vc;
     uint16_t tcr;
     uint16_t rcr;
@@ -36,6 +37,7 @@ typedef struct {
     int rx_fifo[NUM_PACKETS];
     int tx_fifo_done_len;
     int tx_fifo_done[NUM_PACKETS];
+    int iomemtype;
     /* Packet buffer memory.  */
     uint8_t data[NUM_PACKETS][2048];
     uint8_t int_level;
@@ -247,7 +249,6 @@ static void smc91c111_writeb(void *opaque, target_phys_addr_t offset,
 {
     smc91c111_state *s = (smc91c111_state *)opaque;
 
-    offset -= s->base;
     if (offset == 14) {
         s->bank = value;
         return;
@@ -413,14 +414,13 @@ static void smc91c111_writeb(void *opaque, target_phys_addr_t offset,
         break;
     }
     cpu_abort (cpu_single_env, "smc91c111_write: Bad reg %d:%x\n",
-               s->bank, offset);
+               s->bank, (int)offset);
 }
 
 static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset)
 {
     smc91c111_state *s = (smc91c111_state *)opaque;
 
-    offset -= s->base;
     if (offset == 14) {
         return s->bank;
     }
@@ -555,7 +555,7 @@ static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset)
         break;
     }
     cpu_abort (cpu_single_env, "smc91c111_read: Bad reg %d:%x\n",
-               s->bank, offset);
+               s->bank, (int)offset);
     return 0;
 }
 
@@ -569,10 +569,9 @@ static void smc91c111_writew(void *opaque, target_phys_addr_t offset,
 static void smc91c111_writel(void *opaque, target_phys_addr_t offset,
                              uint32_t value)
 {
-    smc91c111_state *s = (smc91c111_state *)opaque;
     /* 32-bit writes to offset 0xc only actually write to the bank select
        register (offset 0xe)  */
-    if (offset != s->base + 0xc)
+    if (offset != 0xc)
         smc91c111_writew(opaque, offset, value & 0xffff);
     smc91c111_writew(opaque, offset + 2, value >> 16);
 }
@@ -649,7 +648,7 @@ static void smc91c111_receive(void *opaque, const uint8_t *buf, int size)
     /* Pad short packets.  */
     if (size < 64) {
         int pad;
-        
+
         if (size & 1)
             *(p++) = buf[size - 1];
         pad = 64 - size;
@@ -692,22 +691,99 @@ static CPUWriteMemoryFunc *smc91c111_writefn[] = {
     smc91c111_writel
 };
 
-void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)
+int smc91c111_iomemtype(void *opaque) {
+    smc91c111_state *s=(smc91c111_state *) opaque;
+    return s->iomemtype;
+}
+
+static void smc91c111_save_state(QEMUFile *f, void *opaque)
+{
+    smc91c111_state *s = (smc91c111_state *)opaque;
+    int i;
+    
+    qemu_put_be16(f, s->tcr);
+    qemu_put_be16(f, s->rcr);
+    qemu_put_be16(f, s->cr);
+    qemu_put_be16(f, s->ctr);
+    qemu_put_be16(f, s->gpr);
+    qemu_put_be16(f, s->ptr);
+    qemu_put_be16(f, s->ercv);
+    qemu_put_sbe32(f, s->bank);
+    qemu_put_sbe32(f, s->packet_num);
+    qemu_put_sbe32(f, s->tx_alloc);
+    qemu_put_sbe32(f, s->allocated);
+    qemu_put_sbe32(f, s->tx_fifo_len);
+    qemu_put_sbe32(f, s->rx_fifo_len);
+    qemu_put_sbe32(f, s->tx_fifo_done_len);
+    qemu_put_byte(f, s->int_level);
+    qemu_put_byte(f, s->int_mask);
+    qemu_put_buffer(f, s->macaddr, sizeof(s->macaddr));
+    for (i = 0; i < NUM_PACKETS; i++) {
+        qemu_put_sbe32(f, s->tx_fifo[i]);
+        qemu_put_sbe32(f, s->rx_fifo[i]);
+        qemu_put_sbe32(f, s->tx_fifo_done[i]);
+        qemu_put_buffer(f, s->data[i], sizeof(s->data[i]));
+    }
+}
+
+static int smc91c111_load_state(QEMUFile *f, void *opaque, int version_id)
+{
+    smc91c111_state *s = (smc91c111_state *)opaque;
+    int i;
+    
+    if (version_id)
+        return -EINVAL;
+    
+    s->tcr = qemu_get_be16(f);
+    s->rcr = qemu_get_be16(f);
+    s->cr = qemu_get_be16(f);
+    s->ctr = qemu_get_be16(f);
+    s->gpr = qemu_get_be16(f);
+    s->ptr = qemu_get_be16(f);
+    s->ercv = qemu_get_be16(f);
+    s->bank = qemu_get_sbe32(f);
+    s->packet_num = qemu_get_sbe32(f);
+    s->tx_alloc = qemu_get_sbe32(f);
+    s->allocated = qemu_get_sbe32(f);
+    s->tx_fifo_len = qemu_get_sbe32(f);
+    s->rx_fifo_len = qemu_get_sbe32(f);
+    s->tx_fifo_done_len = qemu_get_sbe32(f);
+    s->int_level = qemu_get_byte(f);
+    s->int_mask = qemu_get_byte(f);
+    qemu_get_buffer(f, s->macaddr, sizeof(s->macaddr));
+    for (i = 0; i < NUM_PACKETS; i++) {
+        s->tx_fifo[i] = qemu_get_sbe32(f);
+        s->rx_fifo[i] = qemu_get_sbe32(f);
+        s->tx_fifo_done[i] = qemu_get_sbe32(f);
+        qemu_get_buffer(f, s->data[i], sizeof(s->data[i]));
+    }
+    
+    smc91c111_update(s);
+    
+    return 0;
+}
+
+void *smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq, int phys_alloc)
 {
     smc91c111_state *s;
-    int iomemtype;
+
+    qemu_check_nic_model(nd, "smc91c111");
 
     s = (smc91c111_state *)qemu_mallocz(sizeof(smc91c111_state));
-    iomemtype = cpu_register_io_memory(0, smc91c111_readfn,
-                                       smc91c111_writefn, s);
-    cpu_register_physical_memory(base, 16, iomemtype);
-    s->base = base;
+    s->iomemtype = cpu_register_io_memory(0, smc91c111_readfn,
+                                          smc91c111_writefn, s);
+    if (phys_alloc)
+        cpu_register_physical_memory(base, 16, s->iomemtype);
     s->irq = irq;
     memcpy(s->macaddr, nd->macaddr, 6);
 
     smc91c111_reset(s);
 
-    s->vc = qemu_new_vlan_client(nd->vlan, smc91c111_receive,
-                                 smc91c111_can_receive, s);
+    s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
+                                 smc91c111_receive, smc91c111_can_receive, s);
+    qemu_format_nic_info_str(s->vc, s->macaddr);
     /* ??? Save/restore.  */
+    register_savevm("smc91c111", -1, 0,
+                    smc91c111_save_state, smc91c111_load_state, s);
+    return s;
 }