Break up vl.h.

[qemu] / hw / sparc32_dma.c

diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index 1946ce2..742f2d8 100644 (file)
--- a/hw/sparc32_dma.c
+++ b/hw/sparc32_dma.c
@@ -21,7 +21,9 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#include "vl.h"
+#include "hw.h"
+#include "sparc32_dma.h"
+#include "sun4m.h"
 
 /* debug DMA */
 //#define DEBUG_DMA
@@ -59,12 +61,11 @@ struct DMAState {
     uint32_t dmaregs[DMA_REGS];
     qemu_irq irq;
     void *iommu;
-    qemu_irq *pic;
     qemu_irq dev_reset;
 };
 
 /* Note: on sparc, the lance 16 bit bus is swapped */
-void ledma_memory_read(void *opaque, target_phys_addr_t addr, 
+void ledma_memory_read(void *opaque, target_phys_addr_t addr,
                        uint8_t *buf, int len, int do_bswap)
 {
     DMAState *s = opaque;
@@ -85,7 +86,7 @@ void ledma_memory_read(void *opaque, target_phys_addr_t addr,
     }
 }
 
-void ledma_memory_write(void *opaque, target_phys_addr_t addr, 
+void ledma_memory_write(void *opaque, target_phys_addr_t addr,
                         uint8_t *buf, int len, int do_bswap)
 {
     DMAState *s = opaque;
@@ -119,12 +120,12 @@ static void dma_set_irq(void *opaque, int irq, int level)
 {
     DMAState *s = opaque;
     if (level) {
-        DPRINTF("Raise ESP IRQ\n");
+        DPRINTF("Raise IRQ\n");
         s->dmaregs[0] |= DMA_INTR;
         qemu_irq_raise(s->irq);
     } else {
         s->dmaregs[0] &= ~DMA_INTR;
-        DPRINTF("Lower ESP IRQ\n");
+        DPRINTF("Lower IRQ\n");
         qemu_irq_lower(s->irq);
     }
 }