* This code is licenced under the GPL.
*/
-#include "hw.h"
+#include "sysbus.h"
#include "arm-misc.h"
#include "primecell.h"
#include "devices.h"
typedef struct vpb_sic_state
{
- uint32_t base;
+ SysBusDevice busdev;
uint32_t level;
uint32_t mask;
uint32_t pic_enable;
- qemu_irq *parent;
+ qemu_irq parent[32];
int irq;
} vpb_sic_state;
{
vpb_sic_state *s = (vpb_sic_state *)opaque;
- offset -= s->base;
switch (offset >> 2) {
case 0: /* STATUS */
return s->level & s->mask;
uint32_t value)
{
vpb_sic_state *s = (vpb_sic_state *)opaque;
- offset -= s->base;
switch (offset >> 2) {
case 2: /* ENSET */
vpb_sic_update(s);
}
-static CPUReadMemoryFunc *vpb_sic_readfn[] = {
+static CPUReadMemoryFunc * const vpb_sic_readfn[] = {
vpb_sic_read,
vpb_sic_read,
vpb_sic_read
};
-static CPUWriteMemoryFunc *vpb_sic_writefn[] = {
+static CPUWriteMemoryFunc * const vpb_sic_writefn[] = {
vpb_sic_write,
vpb_sic_write,
vpb_sic_write
};
-static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
+static int vpb_sic_init(SysBusDevice *dev)
{
- vpb_sic_state *s;
- qemu_irq *qi;
+ vpb_sic_state *s = FROM_SYSBUS(vpb_sic_state, dev);
int iomemtype;
+ int i;
- s = (vpb_sic_state *)qemu_mallocz(sizeof(vpb_sic_state));
- if (!s)
- return NULL;
- qi = qemu_allocate_irqs(vpb_sic_set_irq, s, 32);
- s->base = base;
- s->parent = parent;
- s->irq = irq;
- iomemtype = cpu_register_io_memory(0, vpb_sic_readfn,
+ qdev_init_gpio_in(&dev->qdev, vpb_sic_set_irq, 32);
+ for (i = 0; i < 32; i++) {
+ sysbus_init_irq(dev, &s->parent[i]);
+ }
+ s->irq = 31;
+ iomemtype = cpu_register_io_memory(vpb_sic_readfn,
vpb_sic_writefn, s);
- cpu_register_physical_memory(base, 0x00001000, iomemtype);
+ sysbus_init_mmio(dev, 0x1000, iomemtype);
/* ??? Save/restore. */
- return qi;
+ return 0;
}
/* Board init. */
peripherans and expansion busses. For now we emulate a subset of the
PB peripherals and just change the board ID. */
-static void versatile_init(int ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static struct arm_boot_info versatile_binfo;
+
+static void versatile_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
int board_id)
{
CPUState *env;
- qemu_irq *pic;
- qemu_irq *sic;
- void *scsi_hba;
+ ram_addr_t ram_offset;
+ qemu_irq *cpu_pic;
+ qemu_irq pic[32];
+ qemu_irq sic[32];
+ DeviceState *dev;
PCIBus *pci_bus;
NICInfo *nd;
int n;
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- /* ??? RAM shoud repeat to fill physical memory space. */
+ ram_offset = qemu_ram_alloc(ram_size);
+ /* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
- cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
arm_sysctl_init(0x10000000, 0x41007004);
- pic = arm_pic_init_cpu(env);
- pic = pl190_init(0x10140000, pic[0], pic[1]);
- sic = vpb_sic_init(0x10003000, pic, 31);
- pl050_init(0x10006000, sic[3], 0);
- pl050_init(0x10007000, sic[4], 1);
+ cpu_pic = arm_pic_init_cpu(env);
+ dev = sysbus_create_varargs("pl190", 0x10140000,
+ cpu_pic[0], cpu_pic[1], NULL);
+ for (n = 0; n < 32; n++) {
+ pic[n] = qdev_get_gpio_in(dev, n);
+ }
+ dev = sysbus_create_simple("versatilepb_sic", 0x10003000, NULL);
+ for (n = 0; n < 32; n++) {
+ sysbus_connect_irq(sysbus_from_qdev(dev), n, pic[n]);
+ sic[n] = qdev_get_gpio_in(dev, n);
+ }
+
+ sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]);
+ sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]);
+
+ dev = sysbus_create_varargs("versatile_pci", 0x40000000,
+ sic[27], sic[28], sic[29], sic[30], NULL);
+ pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
- pci_bus = pci_vpb_init(sic, 27, 0);
/* The Versatile PCI bridge does not provide access to PCI IO space,
so many of the qemu PCI devices are not useable. */
for(n = 0; n < nb_nics; n++) {
nd = &nd_table[n];
- if (!nd->model)
- nd->model = done_smc ? "rtl8139" : "smc91c111";
- if (strcmp(nd->model, "smc91c111") == 0) {
+
+ if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) {
smc91c111_init(nd, 0x10010000, sic[25]);
+ done_smc = 1;
} else {
- pci_nic_init(pci_bus, nd, -1);
+ pci_nic_init(nd, "rtl8139", NULL);
}
}
if (usb_enabled) {
- usb_ohci_init_pci(pci_bus, 3, -1);
+ usb_ohci_init_pci(pci_bus, -1);
}
- scsi_hba = lsi_scsi_init(pci_bus, -1);
- for (n = 0; n < MAX_DISKS; n++) {
- if (bs_table[n]) {
- lsi_scsi_attach(scsi_hba, bs_table[n], n);
- }
+ n = drive_get_max_bus(IF_SCSI);
+ while (n >= 0) {
+ pci_create_simple(pci_bus, -1, "lsi53c895a");
+ n--;
}
- pl011_init(0x101f1000, pic[12], serial_hds[0], PL011_ARM);
- pl011_init(0x101f2000, pic[13], serial_hds[1], PL011_ARM);
- pl011_init(0x101f3000, pic[14], serial_hds[2], PL011_ARM);
- pl011_init(0x10009000, sic[6], serial_hds[3], PL011_ARM);
+ sysbus_create_simple("pl011", 0x101f1000, pic[12]);
+ sysbus_create_simple("pl011", 0x101f2000, pic[13]);
+ sysbus_create_simple("pl011", 0x101f3000, pic[14]);
+ sysbus_create_simple("pl011", 0x10009000, sic[6]);
- pl080_init(0x10130000, pic[17], 8);
- sp804_init(0x101e2000, pic[4]);
- sp804_init(0x101e3000, pic[5]);
+ sysbus_create_simple("pl080", 0x10130000, pic[17]);
+ sysbus_create_simple("sp804", 0x101e2000, pic[4]);
+ sysbus_create_simple("sp804", 0x101e3000, pic[5]);
/* The versatile/PB actually has a modified Color LCD controller
that includes hardware cursor support from the PL111. */
- pl110_init(ds, 0x10120000, pic[16], 1);
+ sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]);
- pl181_init(0x10005000, sd_bdrv, sic[22], sic[1]);
-#if 0
- /* Disabled because there's no way of specifying a block device. */
- pl181_init(0x1000b000, NULL, sic, 23, 2);
-#endif
+ sysbus_create_varargs("pl181", 0x10005000, sic[22], sic[1], NULL);
+ sysbus_create_varargs("pl181", 0x1000b000, sic[23], sic[2], NULL);
/* Add PL031 Real Time Clock. */
- pl031_init(0x101e8000,pic[10]);
+ sysbus_create_simple("pl031", 0x101e8000, pic[10]);
/* Memory map for Versatile/PB: */
/* 0x10000000 System registers. */
/* 0x101f3000 UART2. */
/* 0x101f4000 SSPI. */
- arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
- initrd_filename, board_id, 0x0);
+ versatile_binfo.ram_size = ram_size;
+ versatile_binfo.kernel_filename = kernel_filename;
+ versatile_binfo.kernel_cmdline = kernel_cmdline;
+ versatile_binfo.initrd_filename = initrd_filename;
+ versatile_binfo.board_id = board_id;
+ arm_load_kernel(env, &versatile_binfo);
}
-static void vpb_init(int ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void vpb_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- versatile_init(ram_size, vga_ram_size,
- boot_device, ds,
+ versatile_init(ram_size,
+ boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, cpu_model, 0x183);
}
-static void vab_init(int ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void vab_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- versatile_init(ram_size, vga_ram_size,
- boot_device, ds,
+ versatile_init(ram_size,
+ boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, cpu_model, 0x25e);
}
-QEMUMachine versatilepb_machine = {
- "versatilepb",
- "ARM Versatile/PB (ARM926EJ-S)",
- vpb_init,
+static QEMUMachine versatilepb_machine = {
+ .name = "versatilepb",
+ .desc = "ARM Versatile/PB (ARM926EJ-S)",
+ .init = vpb_init,
+ .use_scsi = 1,
};
-QEMUMachine versatileab_machine = {
- "versatileab",
- "ARM Versatile/AB (ARM926EJ-S)",
- vab_init,
+static QEMUMachine versatileab_machine = {
+ .name = "versatileab",
+ .desc = "ARM Versatile/AB (ARM926EJ-S)",
+ .init = vab_init,
+ .use_scsi = 1,
};
+
+static void versatile_machine_init(void)
+{
+ qemu_register_machine(&versatilepb_machine);
+ qemu_register_machine(&versatileab_machine);
+}
+
+machine_init(versatile_machine_init);
+
+static void versatilepb_register_devices(void)
+{
+ sysbus_register_dev("versatilepb_sic", sizeof(vpb_sic_state),
+ vpb_sic_init);
+}
+
+device_init(versatilepb_register_devices)