* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include "vl.h"
+#include "hw/hw.h"
+#include "hw/usb.h"
+#include "hw/pcmcia.h"
+#include "hw/pc.h"
+#include "hw/pci.h"
+#include "gdbstub.h"
+#include "net.h"
+#include "qemu-char.h"
+#include "sysemu.h"
+#include "console.h"
+#include "block.h"
+#include "audio/audio.h"
#include "disas.h"
#include <dirent.h>
+#ifdef CONFIG_PROFILER
+#include "qemu-timer.h" /* for ticks_per_sec */
+#endif
+
//#define DEBUG
//#define DEBUG_COMPLETION
static term_cmd_t term_cmds[];
static term_cmd_t info_cmds[];
-static char term_outbuf[1024];
+static uint8_t term_outbuf[1024];
static int term_outbuf_index;
static void monitor_start_input(void);
/* flush at every end of line or if the buffer is full */
void term_puts(const char *str)
{
- int c;
+ char c;
for(;;) {
c = *str++;
if (c == '\0')
int i, all_devices;
all_devices = !strcmp(device, "all");
- for (i = 0; i < MAX_DISKS; i++) {
- if (bs_table[i]) {
+ for (i = 0; i < nb_drives; i++) {
if (all_devices ||
- !strcmp(bdrv_get_device_name(bs_table[i]), device))
- bdrv_commit(bs_table[i]);
- }
+ !strcmp(bdrv_get_device_name(drives_table[i].bdrv), device))
+ bdrv_commit(drives_table[i].bdrv);
}
- if (mtd_bdrv)
- if (all_devices || !strcmp(bdrv_get_device_name(mtd_bdrv), device))
- bdrv_commit(mtd_bdrv);
}
static void do_info(const char *item)
bdrv_info();
}
+static void do_info_blockstats(void)
+{
+ bdrv_info_stats();
+}
+
/* get the current CPU defined by the user */
-int mon_set_cpu(int cpu_index)
+static int mon_set_cpu(int cpu_index)
{
CPUState *env;
return -1;
}
-CPUState *mon_get_cpu(void)
+static CPUState *mon_get_cpu(void)
{
if (!mon_cpu) {
mon_set_cpu(0);
{
int i;
const char *str;
-
+
i = 0;
for(;;) {
str = readline_get_history(i);
static void do_log(const char *items)
{
int mask;
-
+
if (!strcmp(items, "none")) {
mask = 0;
} else {
}
static void memory_dump(int count, int format, int wsize,
- target_ulong addr, int is_physical)
+ target_phys_addr_t addr, int is_physical)
{
CPUState *env;
int nb_per_line, l, line_size, i, max_digits, len;
}
while (len > 0) {
- term_printf(TARGET_FMT_lx ":", addr);
+ if (is_physical)
+ term_printf(TARGET_FMT_plx ":", addr);
+ else
+ term_printf(TARGET_FMT_lx ":", (target_ulong)addr);
l = len;
if (l > line_size)
l = line_size;
memory_dump(count, format, size, addr, 0);
}
+#if TARGET_PHYS_ADDR_BITS > 32
+#define GET_TPHYSADDR(h, l) (((uint64_t)(h) << 32) | (l))
+#else
+#define GET_TPHYSADDR(h, l) (l)
+#endif
+
static void do_physical_memory_dump(int count, int format, int size,
uint32_t addrh, uint32_t addrl)
{
- target_long addr = GET_TLONG(addrh, addrl);
+ target_phys_addr_t addr = GET_TPHYSADDR(addrh, addrl);
memory_dump(count, format, size, addr, 1);
}
static void do_print(int count, int format, int size, unsigned int valh, unsigned int vall)
{
- target_long val = GET_TLONG(valh, vall);
-#if TARGET_LONG_BITS == 32
+ target_phys_addr_t val = GET_TPHYSADDR(valh, vall);
+#if TARGET_PHYS_ADDR_BITS == 32
switch(format) {
case 'o':
term_printf("%#o", val);
static const KeyDef key_defs[] = {
{ 0x2a, "shift" },
{ 0x36, "shift_r" },
-
+
{ 0x38, "alt" },
{ 0xb8, "alt_r" },
{ 0x1d, "ctrl" },
{ 0x30, "b" },
{ 0x31, "n" },
{ 0x32, "m" },
-
+
+ { 0x37, "asterisk" },
+
{ 0x39, "spc" },
{ 0x3a, "caps_lock" },
{ 0x3b, "f1" },
{ 0x47, "kp_7" },
{ 0x48, "kp_8" },
{ 0x49, "kp_9" },
-
+
{ 0x56, "<" },
{ 0x57, "f11" },
uint8_t keycodes[16];
const char *p;
int nb_keycodes, keycode, i;
-
+
nb_keycodes = 0;
p = string;
while (*p != '\0') {
"", "show the network state" },
{ "block", "", do_info_block,
"", "show the block devices" },
+ { "blockstats", "", do_info_blockstats,
+ "", "show block device statistics" },
{ "registers", "", do_info_registers,
"", "show the cpu registers" },
{ "cpus", "", do_info_cpus,
{ "cpustats", "", do_info_cpu_stats,
"", "show CPU statistics", },
#endif
+#if defined(CONFIG_SLIRP)
+ { "slirp", "", do_info_slirp,
+ "", "show SLIRP statistics", },
+#endif
{ NULL, NULL, },
};
CPUState *env = mon_get_cpu();
if (!env)
return 0;
- return (env->msr[MSR_POW] << MSR_POW) |
- (env->msr[MSR_ILE] << MSR_ILE) |
- (env->msr[MSR_EE] << MSR_EE) |
- (env->msr[MSR_PR] << MSR_PR) |
- (env->msr[MSR_FP] << MSR_FP) |
- (env->msr[MSR_ME] << MSR_ME) |
- (env->msr[MSR_FE0] << MSR_FE0) |
- (env->msr[MSR_SE] << MSR_SE) |
- (env->msr[MSR_BE] << MSR_BE) |
- (env->msr[MSR_FE1] << MSR_FE1) |
- (env->msr[MSR_IP] << MSR_IP) |
- (env->msr[MSR_IR] << MSR_IR) |
- (env->msr[MSR_DR] << MSR_DR) |
- (env->msr[MSR_RI] << MSR_RI) |
- (env->msr[MSR_LE] << MSR_LE);
+ return env->msr;
}
static target_long monitor_get_xer (struct MonitorDef *md, int val)
CPUState *env = mon_get_cpu();
if (!env)
return 0;
- return (env->xer[XER_SO] << XER_SO) |
- (env->xer[XER_OV] << XER_OV) |
- (env->xer[XER_CA] << XER_CA) |
- (env->xer[XER_BC] << XER_BC);
+ return ppc_load_xer(env);
}
static target_long monitor_get_decr (struct MonitorDef *md, int val)
SEG("gs", R_GS)
{ "pc", 0, monitor_get_pc, },
#elif defined(TARGET_PPC)
+ /* General purpose registers */
{ "r0", offsetof(CPUState, gpr[0]) },
{ "r1", offsetof(CPUState, gpr[1]) },
{ "r2", offsetof(CPUState, gpr[2]) },
{ "r29", offsetof(CPUState, gpr[29]) },
{ "r30", offsetof(CPUState, gpr[30]) },
{ "r31", offsetof(CPUState, gpr[31]) },
+ /* Floating point registers */
+ { "f0", offsetof(CPUState, fpr[0]) },
+ { "f1", offsetof(CPUState, fpr[1]) },
+ { "f2", offsetof(CPUState, fpr[2]) },
+ { "f3", offsetof(CPUState, fpr[3]) },
+ { "f4", offsetof(CPUState, fpr[4]) },
+ { "f5", offsetof(CPUState, fpr[5]) },
+ { "f6", offsetof(CPUState, fpr[6]) },
+ { "f7", offsetof(CPUState, fpr[7]) },
+ { "f8", offsetof(CPUState, fpr[8]) },
+ { "f9", offsetof(CPUState, fpr[9]) },
+ { "f10", offsetof(CPUState, fpr[10]) },
+ { "f11", offsetof(CPUState, fpr[11]) },
+ { "f12", offsetof(CPUState, fpr[12]) },
+ { "f13", offsetof(CPUState, fpr[13]) },
+ { "f14", offsetof(CPUState, fpr[14]) },
+ { "f15", offsetof(CPUState, fpr[15]) },
+ { "f16", offsetof(CPUState, fpr[16]) },
+ { "f17", offsetof(CPUState, fpr[17]) },
+ { "f18", offsetof(CPUState, fpr[18]) },
+ { "f19", offsetof(CPUState, fpr[19]) },
+ { "f20", offsetof(CPUState, fpr[20]) },
+ { "f21", offsetof(CPUState, fpr[21]) },
+ { "f22", offsetof(CPUState, fpr[22]) },
+ { "f23", offsetof(CPUState, fpr[23]) },
+ { "f24", offsetof(CPUState, fpr[24]) },
+ { "f25", offsetof(CPUState, fpr[25]) },
+ { "f26", offsetof(CPUState, fpr[26]) },
+ { "f27", offsetof(CPUState, fpr[27]) },
+ { "f28", offsetof(CPUState, fpr[28]) },
+ { "f29", offsetof(CPUState, fpr[29]) },
+ { "f30", offsetof(CPUState, fpr[30]) },
+ { "f31", offsetof(CPUState, fpr[31]) },
+ { "fpscr", offsetof(CPUState, fpscr) },
+ /* Next instruction pointer */
{ "nip|pc", offsetof(CPUState, nip) },
{ "lr", offsetof(CPUState, lr) },
{ "ctr", offsetof(CPUState, ctr) },
{ "decr", 0, &monitor_get_decr, },
{ "ccr", 0, &monitor_get_ccr, },
+ /* Machine state register */
{ "msr", 0, &monitor_get_msr, },
{ "xer", 0, &monitor_get_xer, },
{ "tbu", 0, &monitor_get_tbu, },
{ "tbl", 0, &monitor_get_tbl, },
+#if defined(TARGET_PPC64)
+ /* Address space register */
+ { "asr", offsetof(CPUState, asr) },
+#endif
+ /* Segment registers */
{ "sdr1", offsetof(CPUState, sdr1) },
{ "sr0", offsetof(CPUState, sr[0]) },
{ "sr1", offsetof(CPUState, sr[1]) },
}
}
-static target_long expr_sum(void);
+static int64_t expr_sum(void);
-static target_long expr_unary(void)
+static int64_t expr_unary(void)
{
- target_long n;
+ int64_t n;
char *p;
int ret;
case '$':
{
char buf[128], *q;
-
+ target_long reg=0;
+
pch++;
q = buf;
while ((*pch >= 'a' && *pch <= 'z') ||
while (isspace(*pch))
pch++;
*q = 0;
- ret = get_monitor_def(&n, buf);
+ ret = get_monitor_def(®, buf);
if (ret == -1)
expr_error("unknown register");
else if (ret == -2)
expr_error("no cpu defined");
+ n = reg;
}
break;
case '\0':
n = 0;
break;
default:
-#if TARGET_LONG_BITS == 64
+#if TARGET_PHYS_ADDR_BITS > 32
n = strtoull(pch, &p, 0);
#else
n = strtoul(pch, &p, 0);
}
-static target_long expr_prod(void)
+static int64_t expr_prod(void)
{
- target_long val, val2;
+ int64_t val, val2;
int op;
-
+
val = expr_unary();
for(;;) {
op = *pch;
return val;
}
-static target_long expr_logic(void)
+static int64_t expr_logic(void)
{
- target_long val, val2;
+ int64_t val, val2;
int op;
val = expr_prod();
return val;
}
-static target_long expr_sum(void)
+static int64_t expr_sum(void)
{
- target_long val, val2;
+ int64_t val, val2;
int op;
val = expr_logic();
return val;
}
-static int get_expr(target_long *pval, const char **pp)
+static int get_expr(int64_t *pval, const char **pp)
{
pch = *pp;
if (setjmp(expr_env)) {
#ifdef DEBUG
term_printf("command='%s'\n", cmdline);
#endif
-
+
/* extract the command name */
p = cmdline;
q = cmdname;
len = sizeof(cmdname) - 1;
memcpy(cmdname, pstart, len);
cmdname[len] = '\0';
-
+
/* find the command */
for(cmd = term_cmds; cmd->name != NULL; cmd++) {
if (compare_cmd(cmdname, cmd->name))
for(i = 0; i < MAX_ARGS; i++)
str_allocated[i] = NULL;
-
+
/* parse the parameters */
typestr = cmd->args_type;
nb_args = 0;
{
int ret;
char *str;
-
+
while (isspace(*p))
p++;
if (*typestr == '?') {
case '/':
{
int count, format, size;
-
+
while (isspace(*p))
p++;
if (*p == '/') {
case 'i':
case 'l':
{
- target_long val;
+ int64_t val;
+
while (isspace(*p))
p++;
if (*typestr == '?' || *typestr == '.') {
} else {
if ((nb_args + 1) >= MAX_ARGS)
goto error_args;
-#if TARGET_LONG_BITS == 64
+#if TARGET_PHYS_ADDR_BITS > 32
args[nb_args++] = (void *)(long)((val >> 32) & 0xffffffff);
#else
args[nb_args++] = (void *)0;
{
int has_option;
/* option */
-
+
c = *typestr++;
if (c == '\0')
goto bad_type;
hide_banner = !show_banner;
qemu_chr_add_handlers(hd, term_can_read, term_read, term_event, NULL);
+
+ readline_start("", 0, monitor_handle_command1, NULL);
}
/* XXX: use threads ? */
projects / qemu / blobdiff