-typedef unsigned char uint8_t;
-typedef unsigned short uint16_t;
-typedef unsigned int uint32_t;
-typedef unsigned long long uint64_t;
-
-typedef signed char int8_t;
-typedef signed short int16_t;
-typedef signed int int32_t;
-typedef signed long long int64_t;
-
-#define NULL 0
-
-#ifdef __i386__
-register int T0 asm("esi");
-register int T1 asm("ebx");
-register int A0 asm("edi");
-register struct CPU86State *env asm("ebp");
-#define FORCE_RET() asm volatile ("ret");
-#endif
-#ifdef __powerpc__
-register int T0 asm("r24");
-register int T1 asm("r25");
-register int A0 asm("r26");
-register struct CPU86State *env asm("r27");
-#define FORCE_RET() asm volatile ("blr");
-#endif
-#ifdef __arm__
-register int T0 asm("r4");
-register int T1 asm("r5");
-register int A0 asm("r6");
-register struct CPU86State *env asm("r7");
-#define FORCE_RET() asm volatile ("mov pc, lr");
-#endif
-#ifdef __mips__
-register int T0 asm("s0");
-register int T1 asm("s1");
-register int A0 asm("s2");
-register struct CPU86State *env asm("s3");
-#define FORCE_RET() asm volatile ("jr $31");
-#endif
-#ifdef __sparc__
-register int T0 asm("l0");
-register int T1 asm("l1");
-register int A0 asm("l2");
-register struct CPU86State *env asm("l3");
-#define FORCE_RET() asm volatile ("retl ; nop");
-#endif
-
-#ifndef OPPROTO
-#define OPPROTO
-#endif
-
-#define xglue(x, y) x ## y
-#define glue(x, y) xglue(x, y)
-
-#define EAX (env->regs[R_EAX])
-#define ECX (env->regs[R_ECX])
-#define EDX (env->regs[R_EDX])
-#define EBX (env->regs[R_EBX])
-#define ESP (env->regs[R_ESP])
-#define EBP (env->regs[R_EBP])
-#define ESI (env->regs[R_ESI])
-#define EDI (env->regs[R_EDI])
-#define PC (env->pc)
-#define DF (env->df)
-
-#define CC_SRC (env->cc_src)
-#define CC_DST (env->cc_dst)
-#define CC_OP (env->cc_op)
-
-/* float macros */
-#define FT0 (env->ft0)
-#define ST0 (env->fpregs[env->fpstt])
-#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7])
-#define ST1 ST(1)
-
-extern int __op_param1, __op_param2, __op_param3;
-#define PARAM1 ((long)(&__op_param1))
-#define PARAM2 ((long)(&__op_param2))
-#define PARAM3 ((long)(&__op_param3))
-
-#include "cpu-i386.h"
-
-typedef struct CCTable {
- int (*compute_all)(void); /* return all the flags */
- int (*compute_c)(void); /* return the C flag */
-} CCTable;
-
-extern CCTable cc_table[];
+/*
+ * i386 micro operations
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include "exec-i386.h"
+
+/* NOTE: data are not static to force relocation generation by GCC */
uint8_t parity_table[256] = {
CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
#undef REG
#undef REGNAME
-/* operations */
+/* operations with flags */
void OPPROTO op_addl_T0_T1_cc(void)
{
CC_DST = T0;
}
-void OPPROTO op_adcl_T0_T1_cc(void)
-{
- CC_SRC = T0;
- T0 = T0 + T1 + cc_table[CC_OP].compute_c();
- CC_DST = T0;
-}
-
-void OPPROTO op_sbbl_T0_T1_cc(void)
-{
- CC_SRC = T0;
- T0 = T0 - T1 - cc_table[CC_OP].compute_c();
- CC_DST = T0;
-}
-
void OPPROTO op_andl_T0_T1_cc(void)
{
T0 &= T1;
CC_DST = T0 - T1;
}
-void OPPROTO op_notl_T0(void)
-{
- T0 = ~T0;
-}
-
void OPPROTO op_negl_T0_cc(void)
{
CC_SRC = 0;
void OPPROTO op_incl_T0_cc(void)
{
+ CC_SRC = cc_table[CC_OP].compute_c();
T0++;
CC_DST = T0;
}
void OPPROTO op_decl_T0_cc(void)
{
+ CC_SRC = cc_table[CC_OP].compute_c();
T0--;
CC_DST = T0;
}
void OPPROTO op_testl_T0_T1_cc(void)
{
- CC_SRC = T0;
CC_DST = T0 & T1;
}
+/* operations without flags */
+
+void OPPROTO op_addl_T0_T1(void)
+{
+ T0 += T1;
+}
+
+void OPPROTO op_orl_T0_T1(void)
+{
+ T0 |= T1;
+}
+
+void OPPROTO op_andl_T0_T1(void)
+{
+ T0 &= T1;
+}
+
+void OPPROTO op_subl_T0_T1(void)
+{
+ T0 -= T1;
+}
+
+void OPPROTO op_xorl_T0_T1(void)
+{
+ T0 ^= T1;
+}
+
+void OPPROTO op_negl_T0(void)
+{
+ T0 = -T0;
+}
+
+void OPPROTO op_incl_T0(void)
+{
+ T0++;
+}
+
+void OPPROTO op_decl_T0(void)
+{
+ T0--;
+}
+
+void OPPROTO op_notl_T0(void)
+{
+ T0 = ~T0;
+}
+
+void OPPROTO op_bswapl_T0(void)
+{
+ T0 = bswap32(T0);
+}
+
/* multiply/divide */
void OPPROTO op_mulb_AL_T0(void)
{
void OPPROTO op_imull_T0_T1(void)
{
int64_t res;
- res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T1);
+ res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
T0 = res;
CC_SRC = (res != (int32_t)res);
}
/* division, flags are undefined */
-/* XXX: add exceptions for overflow & div by zero */
+/* XXX: add exceptions for overflow */
void OPPROTO op_divb_AL_T0(void)
{
unsigned int num, den, q, r;
num = (EAX & 0xffff);
den = (T0 & 0xff);
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den) & 0xff;
r = (num % den) & 0xff;
EAX = (EAX & 0xffff0000) | (r << 8) | q;
num = (int16_t)EAX;
den = (int8_t)T0;
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den) & 0xff;
r = (num % den) & 0xff;
EAX = (EAX & 0xffff0000) | (r << 8) | q;
num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
den = (T0 & 0xffff);
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den) & 0xffff;
r = (num % den) & 0xffff;
EAX = (EAX & 0xffff0000) | q;
num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
den = (int16_t)T0;
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den) & 0xffff;
r = (num % den) & 0xffff;
EAX = (EAX & 0xffff0000) | q;
num = EAX | ((uint64_t)EDX << 32);
den = T0;
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den);
r = (num % den);
EAX = q;
void OPPROTO op_idivl_EAX_T0(void)
{
int den, q, r;
- int16_t num;
+ int64_t num;
num = EAX | ((uint64_t)EDX << 32);
- den = (int16_t)T0;
+ den = T0;
+ if (den == 0)
+ raise_exception(EXCP00_DIVZ);
q = (num / den);
r = (num % den);
EAX = q;
EDX = r;
}
-/* constant load */
+/* constant load & misc op */
-void OPPROTO op1_movl_T0_im(void)
+void OPPROTO op_movl_T0_im(void)
{
T0 = PARAM1;
}
-void OPPROTO op1_movl_T1_im(void)
+void OPPROTO op_addl_T0_im(void)
+{
+ T0 += PARAM1;
+}
+
+void OPPROTO op_andl_T0_ffff(void)
+{
+ T0 = T0 & 0xffff;
+}
+
+void OPPROTO op_movl_T0_T1(void)
+{
+ T0 = T1;
+}
+
+void OPPROTO op_movl_T1_im(void)
{
T1 = PARAM1;
}
-void OPPROTO op1_movl_A0_im(void)
+void OPPROTO op_addl_T1_im(void)
+{
+ T1 += PARAM1;
+}
+
+void OPPROTO op_movl_T1_A0(void)
+{
+ T1 = A0;
+}
+
+void OPPROTO op_movl_A0_im(void)
{
A0 = PARAM1;
}
+void OPPROTO op_addl_A0_im(void)
+{
+ A0 += PARAM1;
+}
+
+void OPPROTO op_addl_A0_AL(void)
+{
+ A0 += (EAX & 0xff);
+}
+
+void OPPROTO op_andl_A0_ffff(void)
+{
+ A0 = A0 & 0xffff;
+}
+
/* memory access */
void OPPROTO op_ldub_T0_A0(void)
stl((uint8_t *)A0, T0);
}
-/* jumps */
+/* used for bit operations */
+
+void OPPROTO op_add_bitw_A0_T1(void)
+{
+ A0 += ((int32_t)T1 >> 4) << 1;
+}
+
+void OPPROTO op_add_bitl_A0_T1(void)
+{
+ A0 += ((int32_t)T1 >> 5) << 2;
+}
/* indirect jump */
+
void OPPROTO op_jmp_T0(void)
{
- PC = T0;
+ EIP = T0;
}
void OPPROTO op_jmp_im(void)
{
- PC = PARAM1;
+ EIP = PARAM1;
+}
+
+void OPPROTO op_int_im(void)
+{
+ EIP = PARAM1;
+ raise_exception(EXCP0D_GPF);
+}
+
+void OPPROTO op_int3(void)
+{
+ EIP = PARAM1;
+ raise_exception(EXCP03_INT3);
+}
+
+void OPPROTO op_into(void)
+{
+ int eflags;
+ eflags = cc_table[CC_OP].compute_all();
+ if (eflags & CC_O) {
+ raise_exception(EXCP04_INTO);
+ }
+}
+
+/* XXX: add IOPL/CPL tests */
+void OPPROTO op_cli(void)
+{
+ raise_exception(EXCP0D_GPF);
+}
+
+/* XXX: add IOPL/CPL tests */
+void OPPROTO op_sti(void)
+{
+ raise_exception(EXCP0D_GPF);
+}
+
+/* vm86plus instructions */
+
+void OPPROTO op_cli_vm(void)
+{
+ env->eflags &= ~VIF_MASK;
+}
+
+void OPPROTO op_sti_vm(void)
+{
+ env->eflags |= VIF_MASK;
+ if (env->eflags & VIP_MASK) {
+ EIP = PARAM1;
+ raise_exception(EXCP0D_GPF);
+ }
+ FORCE_RET();
+}
+
+void OPPROTO op_boundw(void)
+{
+ int low, high, v;
+ low = ldsw((uint8_t *)A0);
+ high = ldsw((uint8_t *)A0 + 2);
+ v = (int16_t)T0;
+ if (v < low || v > high)
+ raise_exception(EXCP05_BOUND);
+ FORCE_RET();
+}
+
+void OPPROTO op_boundl(void)
+{
+ int low, high, v;
+ low = ldl((uint8_t *)A0);
+ high = ldl((uint8_t *)A0 + 4);
+ v = T0;
+ if (v < low || v > high)
+ raise_exception(EXCP05_BOUND);
+ FORCE_RET();
+}
+
+void OPPROTO op_cmpxchg8b(void)
+{
+ uint64_t d;
+ int eflags;
+
+ eflags = cc_table[CC_OP].compute_all();
+ d = ldq((uint8_t *)A0);
+ if (d == (((uint64_t)EDX << 32) | EAX)) {
+ stq((uint8_t *)A0, ((uint64_t)ECX << 32) | EBX);
+ eflags |= CC_Z;
+ } else {
+ EDX = d >> 32;
+ EAX = d;
+ eflags &= ~CC_Z;
+ }
+ CC_SRC = eflags;
+ FORCE_RET();
}
/* string ops */
}
/* push/pop */
-/* XXX: add 16 bit operand/16 bit seg variants */
void op_pushl_T0(void)
{
ESP = offset;
}
-void op_pushl_T1(void)
+void op_pushw_T0(void)
+{
+ uint32_t offset;
+ offset = ESP - 2;
+ stw((void *)offset, T0);
+ /* modify ESP after to handle exceptions correctly */
+ ESP = offset;
+}
+
+void op_pushl_ss32_T0(void)
{
uint32_t offset;
offset = ESP - 4;
- stl((void *)offset, T1);
+ stl(env->seg_cache[R_SS].base + offset, T0);
+ /* modify ESP after to handle exceptions correctly */
+ ESP = offset;
+}
+
+void op_pushw_ss32_T0(void)
+{
+ uint32_t offset;
+ offset = ESP - 2;
+ stw(env->seg_cache[R_SS].base + offset, T0);
/* modify ESP after to handle exceptions correctly */
ESP = offset;
}
+void op_pushl_ss16_T0(void)
+{
+ uint32_t offset;
+ offset = (ESP - 4) & 0xffff;
+ stl(env->seg_cache[R_SS].base + offset, T0);
+ /* modify ESP after to handle exceptions correctly */
+ ESP = (ESP & ~0xffff) | offset;
+}
+
+void op_pushw_ss16_T0(void)
+{
+ uint32_t offset;
+ offset = (ESP - 2) & 0xffff;
+ stw(env->seg_cache[R_SS].base + offset, T0);
+ /* modify ESP after to handle exceptions correctly */
+ ESP = (ESP & ~0xffff) | offset;
+}
+
+/* NOTE: ESP update is done after */
void op_popl_T0(void)
{
T0 = ldl((void *)ESP);
+}
+
+void op_popw_T0(void)
+{
+ T0 = lduw((void *)ESP);
+}
+
+void op_popl_ss32_T0(void)
+{
+ T0 = ldl(env->seg_cache[R_SS].base + ESP);
+}
+
+void op_popw_ss32_T0(void)
+{
+ T0 = lduw(env->seg_cache[R_SS].base + ESP);
+}
+
+void op_popl_ss16_T0(void)
+{
+ T0 = ldl(env->seg_cache[R_SS].base + (ESP & 0xffff));
+}
+
+void op_popw_ss16_T0(void)
+{
+ T0 = lduw(env->seg_cache[R_SS].base + (ESP & 0xffff));
+}
+
+void op_addl_ESP_4(void)
+{
ESP += 4;
}
+void op_addl_ESP_2(void)
+{
+ ESP += 2;
+}
+
+void op_addw_ESP_4(void)
+{
+ ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
+}
+
+void op_addw_ESP_2(void)
+{
+ ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
+}
+
void op_addl_ESP_im(void)
{
ESP += PARAM1;
}
+void op_addw_ESP_im(void)
+{
+ ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
+}
+
+/* rdtsc */
+#ifndef __i386__
+uint64_t emu_time;
+#endif
+
+void OPPROTO op_rdtsc(void)
+{
+ uint64_t val;
+#ifdef __i386__
+ asm("rdtsc" : "=A" (val));
+#else
+ /* better than nothing: the time increases */
+ val = emu_time++;
+#endif
+ EAX = val;
+ EDX = val >> 32;
+}
+
+/* We simulate a pre-MMX pentium as in valgrind */
+#define CPUID_FP87 (1 << 0)
+#define CPUID_VME (1 << 1)
+#define CPUID_DE (1 << 2)
+#define CPUID_PSE (1 << 3)
+#define CPUID_TSC (1 << 4)
+#define CPUID_MSR (1 << 5)
+#define CPUID_PAE (1 << 6)
+#define CPUID_MCE (1 << 7)
+#define CPUID_CX8 (1 << 8)
+#define CPUID_APIC (1 << 9)
+#define CPUID_SEP (1 << 11) /* sysenter/sysexit */
+#define CPUID_MTRR (1 << 12)
+#define CPUID_PGE (1 << 13)
+#define CPUID_MCA (1 << 14)
+#define CPUID_CMOV (1 << 15)
+/* ... */
+#define CPUID_MMX (1 << 23)
+#define CPUID_FXSR (1 << 24)
+#define CPUID_SSE (1 << 25)
+#define CPUID_SSE2 (1 << 26)
+
+void helper_cpuid(void)
+{
+ if (EAX == 0) {
+ EAX = 1; /* max EAX index supported */
+ EBX = 0x756e6547;
+ ECX = 0x6c65746e;
+ EDX = 0x49656e69;
+ } else {
+ /* EAX = 1 info */
+ EAX = 0x52b;
+ EBX = 0;
+ ECX = 0;
+ EDX = CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE |
+ CPUID_TSC | CPUID_MSR | CPUID_MCE |
+ CPUID_CX8;
+ }
+}
+
+void OPPROTO op_cpuid(void)
+{
+ helper_cpuid();
+}
+
+/* bcd */
+
+/* XXX: exception */
+void OPPROTO op_aam(void)
+{
+ int base = PARAM1;
+ int al, ah;
+ al = EAX & 0xff;
+ ah = al / base;
+ al = al % base;
+ EAX = (EAX & ~0xffff) | al | (ah << 8);
+ CC_DST = al;
+}
+
+void OPPROTO op_aad(void)
+{
+ int base = PARAM1;
+ int al, ah;
+ al = EAX & 0xff;
+ ah = (EAX >> 8) & 0xff;
+ al = ((ah * base) + al) & 0xff;
+ EAX = (EAX & ~0xffff) | al;
+ CC_DST = al;
+}
+
+void OPPROTO op_aaa(void)
+{
+ int icarry;
+ int al, ah, af;
+ int eflags;
+
+ eflags = cc_table[CC_OP].compute_all();
+ af = eflags & CC_A;
+ al = EAX & 0xff;
+ ah = (EAX >> 8) & 0xff;
+
+ icarry = (al > 0xf9);
+ if (((al & 0x0f) > 9 ) || af) {
+ al = (al + 6) & 0x0f;
+ ah = (ah + 1 + icarry) & 0xff;
+ eflags |= CC_C | CC_A;
+ } else {
+ eflags &= ~(CC_C | CC_A);
+ al &= 0x0f;
+ }
+ EAX = (EAX & ~0xffff) | al | (ah << 8);
+ CC_SRC = eflags;
+}
+
+void OPPROTO op_aas(void)
+{
+ int icarry;
+ int al, ah, af;
+ int eflags;
+
+ eflags = cc_table[CC_OP].compute_all();
+ af = eflags & CC_A;
+ al = EAX & 0xff;
+ ah = (EAX >> 8) & 0xff;
+
+ icarry = (al < 6);
+ if (((al & 0x0f) > 9 ) || af) {
+ al = (al - 6) & 0x0f;
+ ah = (ah - 1 - icarry) & 0xff;
+ eflags |= CC_C | CC_A;
+ } else {
+ eflags &= ~(CC_C | CC_A);
+ al &= 0x0f;
+ }
+ EAX = (EAX & ~0xffff) | al | (ah << 8);
+ CC_SRC = eflags;
+}
+
+void OPPROTO op_daa(void)
+{
+ int al, af, cf;
+ int eflags;
+
+ eflags = cc_table[CC_OP].compute_all();
+ cf = eflags & CC_C;
+ af = eflags & CC_A;
+ al = EAX & 0xff;
+
+ eflags = 0;
+ if (((al & 0x0f) > 9 ) || af) {
+ al = (al + 6) & 0xff;
+ eflags |= CC_A;
+ }
+ if ((al > 0x9f) || cf) {
+ al = (al + 0x60) & 0xff;
+ eflags |= CC_C;
+ }
+ EAX = (EAX & ~0xff) | al;
+ /* well, speed is not an issue here, so we compute the flags by hand */
+ eflags |= (al == 0) << 6; /* zf */
+ eflags |= parity_table[al]; /* pf */
+ eflags |= (al & 0x80); /* sf */
+ CC_SRC = eflags;
+}
+
+void OPPROTO op_das(void)
+{
+ int al, al1, af, cf;
+ int eflags;
+
+ eflags = cc_table[CC_OP].compute_all();
+ cf = eflags & CC_C;
+ af = eflags & CC_A;
+ al = EAX & 0xff;
+
+ eflags = 0;
+ al1 = al;
+ if (((al & 0x0f) > 9 ) || af) {
+ eflags |= CC_A;
+ if (al < 6 || cf)
+ eflags |= CC_C;
+ al = (al - 6) & 0xff;
+ }
+ if ((al1 > 0x99) || cf) {
+ al = (al - 0x60) & 0xff;
+ eflags |= CC_C;
+ }
+ EAX = (EAX & ~0xff) | al;
+ /* well, speed is not an issue here, so we compute the flags by hand */
+ eflags |= (al == 0) << 6; /* zf */
+ eflags |= parity_table[al]; /* pf */
+ eflags |= (al & 0x80); /* sf */
+ CC_SRC = eflags;
+}
+
+/* segment handling */
+
+/* XXX: use static VM86 information */
+void load_seg(int seg_reg, int selector)
+{
+ SegmentCache *sc;
+ SegmentDescriptorTable *dt;
+ int index;
+ uint32_t e1, e2;
+ uint8_t *ptr;
+
+ env->segs[seg_reg] = selector;
+ sc = &env->seg_cache[seg_reg];
+ if (env->eflags & VM_MASK) {
+ sc->base = (void *)(selector << 4);
+ sc->limit = 0xffff;
+ sc->seg_32bit = 0;
+ } else {
+ if (selector & 0x4)
+ dt = &env->ldt;
+ else
+ dt = &env->gdt;
+ index = selector & ~7;
+ if ((index + 7) > dt->limit)
+ raise_exception(EXCP0D_GPF);
+ ptr = dt->base + index;
+ e1 = ldl(ptr);
+ e2 = ldl(ptr + 4);
+ sc->base = (void *)((e1 >> 16) | ((e2 & 0xff) << 16) | (e2 & 0xff000000));
+ sc->limit = (e1 & 0xffff) | (e2 & 0x000f0000);
+ if (e2 & (1 << 23))
+ sc->limit = (sc->limit << 12) | 0xfff;
+ sc->seg_32bit = (e2 >> 22) & 1;
+#if 0
+ fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx seg_32bit=%d\n",
+ selector, (unsigned long)sc->base, sc->limit, sc->seg_32bit);
+#endif
+ }
+}
+
+void OPPROTO op_movl_seg_T0(void)
+{
+ load_seg(PARAM1, T0 & 0xffff);
+}
+
+void OPPROTO op_movl_T0_seg(void)
+{
+ T0 = env->segs[PARAM1];
+}
+
+void OPPROTO op_movl_A0_seg(void)
+{
+ A0 = *(unsigned long *)((char *)env + PARAM1);
+}
+
+void OPPROTO op_addl_A0_seg(void)
+{
+ A0 += *(unsigned long *)((char *)env + PARAM1);
+}
+
/* flags handling */
/* slow jumps cases (compute x86 flags) */
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (eflags & CC_O)
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jb_cc(void)
{
if (cc_table[CC_OP].compute_c())
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jz_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (eflags & CC_Z)
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jbe_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (eflags & (CC_Z | CC_C))
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_js_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (eflags & CC_S)
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jp_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (eflags & CC_P)
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jl_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if ((eflags ^ (eflags >> 4)) & 0x80)
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
void OPPROTO op_jle_cc(void)
int eflags;
eflags = cc_table[CC_OP].compute_all();
if (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z))
- PC += PARAM1;
+ EIP = PARAM1;
else
- PC += PARAM2;
+ EIP = PARAM2;
+ FORCE_RET();
}
/* slow set cases (compute x86 flags) */
CC_OP = PARAM1;
}
+#define FL_UPDATE_MASK32 (TF_MASK | AC_MASK | ID_MASK)
+#define FL_UPDATE_MASK16 (TF_MASK)
+
void OPPROTO op_movl_eflags_T0(void)
{
- CC_SRC = T0;
- DF = 1 - (2 * ((T0 >> 10) & 1));
+ int eflags;
+ eflags = T0;
+ CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+ DF = 1 - (2 * ((eflags >> 10) & 1));
+ /* we also update some system flags as in user mode */
+ env->eflags = (env->eflags & ~FL_UPDATE_MASK32) | (eflags & FL_UPDATE_MASK32);
+}
+
+void OPPROTO op_movw_eflags_T0(void)
+{
+ int eflags;
+ eflags = T0;
+ CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+ DF = 1 - (2 * ((eflags >> 10) & 1));
+ /* we also update some system flags as in user mode */
+ env->eflags = (env->eflags & ~FL_UPDATE_MASK16) | (eflags & FL_UPDATE_MASK16);
+}
+
+/* vm86 version */
+void OPPROTO op_movw_eflags_T0_vm(void)
+{
+ int eflags;
+ eflags = T0;
+ CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+ DF = 1 - (2 * ((eflags >> 10) & 1));
+ /* we also update some system flags as in user mode */
+ env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
+ (eflags & FL_UPDATE_MASK16);
+ if (eflags & IF_MASK) {
+ env->eflags |= VIF_MASK;
+ if (env->eflags & VIP_MASK) {
+ EIP = PARAM1;
+ raise_exception(EXCP0D_GPF);
+ }
+ }
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_eflags_T0_vm(void)
+{
+ int eflags;
+ eflags = T0;
+ CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+ DF = 1 - (2 * ((eflags >> 10) & 1));
+ /* we also update some system flags as in user mode */
+ env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
+ (eflags & FL_UPDATE_MASK32);
+ if (eflags & IF_MASK) {
+ env->eflags |= VIF_MASK;
+ if (env->eflags & VIP_MASK) {
+ EIP = PARAM1;
+ raise_exception(EXCP0D_GPF);
+ }
+ }
+ FORCE_RET();
}
/* XXX: compute only O flag */
{
int of;
of = cc_table[CC_OP].compute_all() & CC_O;
- CC_SRC = T0 | of;
+ CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
}
void OPPROTO op_movl_T0_eflags(void)
{
- T0 = cc_table[CC_OP].compute_all();
- T0 |= (DF & DIRECTION_FLAG);
+ int eflags;
+ eflags = cc_table[CC_OP].compute_all();
+ eflags |= (DF & DF_MASK);
+ eflags |= env->eflags & ~(VM_MASK | RF_MASK);
+ T0 = eflags;
+}
+
+/* vm86 version */
+void OPPROTO op_movl_T0_eflags_vm(void)
+{
+ int eflags;
+ eflags = cc_table[CC_OP].compute_all();
+ eflags |= (DF & DF_MASK);
+ eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
+ if (env->eflags & VIF_MASK)
+ eflags |= IF_MASK;
+ T0 = eflags;
}
void OPPROTO op_cld(void)
CC_SRC = eflags;
}
+void OPPROTO op_salc(void)
+{
+ int cf;
+ cf = cc_table[CC_OP].compute_c();
+ EAX = (EAX & ~0xff) | ((-cf) & 0xff);
+}
+
static int compute_all_eflags(void)
{
return CC_SRC;
[CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
[CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
+ [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
+ [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
+ [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
+
[CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
[CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
[CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
+ [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
+ [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
+ [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
+
[CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
[CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
[CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
- [CC_OP_INCB] = { compute_all_incb, compute_c_incb },
- [CC_OP_INCW] = { compute_all_incw, compute_c_incw },
+ [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
+ [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
[CC_OP_INCL] = { compute_all_incl, compute_c_incl },
- [CC_OP_DECB] = { compute_all_decb, compute_c_incb },
- [CC_OP_DECW] = { compute_all_decw, compute_c_incw },
+ [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
+ [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
[CC_OP_DECL] = { compute_all_decl, compute_c_incl },
- [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
- [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
+ [CC_OP_SHLB] = { compute_all_shlb, compute_c_shll },
+ [CC_OP_SHLW] = { compute_all_shlw, compute_c_shll },
[CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
+
+ [CC_OP_SARB] = { compute_all_sarb, compute_c_shll },
+ [CC_OP_SARW] = { compute_all_sarw, compute_c_shll },
+ [CC_OP_SARL] = { compute_all_sarl, compute_c_shll },
};
-/* floating point support */
+/* floating point support. Some of the code for complicated x87
+ functions comes from the LGPL'ed x86 emulator found in the Willows
+ TWIN windows emulator. */
#ifdef USE_X86LDOUBLE
/* use long double functions */
#else
-typedef {
+typedef union {
double d;
#ifndef WORDS_BIGENDIAN
struct {
FT0 = ldfq((void *)A0);
}
+/* helpers are needed to avoid static constant reference. XXX: find a better way */
+#ifdef USE_INT_TO_FLOAT_HELPERS
+
+void helper_fild_FT0_A0(void)
+{
+ FT0 = (CPU86_LDouble)ldsw((void *)A0);
+}
+
+void helper_fildl_FT0_A0(void)
+{
+ FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
+}
+
+void helper_fildll_FT0_A0(void)
+{
+ FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
+}
+
+void OPPROTO op_fild_FT0_A0(void)
+{
+ helper_fild_FT0_A0();
+}
+
+void OPPROTO op_fildl_FT0_A0(void)
+{
+ helper_fildl_FT0_A0();
+}
+
+void OPPROTO op_fildll_FT0_A0(void)
+{
+ helper_fildll_FT0_A0();
+}
+
+#else
+
void OPPROTO op_fild_FT0_A0(void)
{
FT0 = (CPU86_LDouble)ldsw((void *)A0);
{
FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
}
+#endif
/* fp load ST0 */
ST0 = ldfq((void *)A0);
}
+#ifdef USE_X86LDOUBLE
+void OPPROTO op_fldt_ST0_A0(void)
+{
+ ST0 = *(long double *)A0;
+}
+#else
+void helper_fldt_ST0_A0(void)
+{
+ CPU86_LDoubleU temp;
+ int upper, e;
+ /* mantissa */
+ upper = lduw((uint8_t *)A0 + 8);
+ /* XXX: handle overflow ? */
+ e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
+ e |= (upper >> 4) & 0x800; /* sign */
+ temp.ll = ((ldq((void *)A0) >> 11) & ((1LL << 52) - 1)) | ((uint64_t)e << 52);
+ ST0 = temp.d;
+}
+
+void OPPROTO op_fldt_ST0_A0(void)
+{
+ helper_fldt_ST0_A0();
+}
+#endif
+
+/* helpers are needed to avoid static constant reference. XXX: find a better way */
+#ifdef USE_INT_TO_FLOAT_HELPERS
+
+void helper_fild_ST0_A0(void)
+{
+ ST0 = (CPU86_LDouble)ldsw((void *)A0);
+}
+
+void helper_fildl_ST0_A0(void)
+{
+ ST0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
+}
+
+void helper_fildll_ST0_A0(void)
+{
+ ST0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
+}
+
+void OPPROTO op_fild_ST0_A0(void)
+{
+ helper_fild_ST0_A0();
+}
+
+void OPPROTO op_fildl_ST0_A0(void)
+{
+ helper_fildl_ST0_A0();
+}
+
+void OPPROTO op_fildll_ST0_A0(void)
+{
+ helper_fildll_ST0_A0();
+}
+
+#else
+
void OPPROTO op_fild_ST0_A0(void)
{
ST0 = (CPU86_LDouble)ldsw((void *)A0);
ST0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
}
+#endif
+
/* fp store */
void OPPROTO op_fsts_ST0_A0(void)
void OPPROTO op_fstl_ST0_A0(void)
{
- ST0 = ldfq((void *)A0);
+ stfq((void *)A0, (double)ST0);
}
+#ifdef USE_X86LDOUBLE
+void OPPROTO op_fstt_ST0_A0(void)
+{
+ *(long double *)A0 = ST0;
+}
+#else
+void helper_fstt_ST0_A0(void)
+{
+ CPU86_LDoubleU temp;
+ int e;
+ temp.d = ST0;
+ /* mantissa */
+ stq((void *)A0, (MANTD(temp) << 11) | (1LL << 63));
+ /* exponent + sign */
+ e = EXPD(temp) - EXPBIAS + 16383;
+ e |= SIGND(temp) >> 16;
+ stw((uint8_t *)A0 + 8, e);
+}
+
+void OPPROTO op_fstt_ST0_A0(void)
+{
+ helper_fstt_ST0_A0();
+}
+#endif
+
void OPPROTO op_fist_ST0_A0(void)
{
int val;
stq((void *)A0, val);
}
+/* BCD ops */
+
+#define MUL10(iv) ( iv + iv + (iv << 3) )
+
+void helper_fbld_ST0_A0(void)
+{
+ uint8_t *seg;
+ CPU86_LDouble fpsrcop;
+ int m32i;
+ unsigned int v;
+
+ /* in this code, seg/m32i will be used as temporary ptr/int */
+ seg = (uint8_t *)A0 + 8;
+ v = ldub(seg--);
+ /* XXX: raise exception */
+ if (v != 0)
+ return;
+ v = ldub(seg--);
+ /* XXX: raise exception */
+ if ((v & 0xf0) != 0)
+ return;
+ m32i = v; /* <-- d14 */
+ v = ldub(seg--);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d13 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d12 */
+ v = ldub(seg--);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d11 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d10 */
+ v = ldub(seg--);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d9 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d8 */
+ fpsrcop = ((CPU86_LDouble)m32i) * 100000000.0;
+
+ v = ldub(seg--);
+ m32i = (v >> 4); /* <-- d7 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d6 */
+ v = ldub(seg--);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d5 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d4 */
+ v = ldub(seg--);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d3 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d2 */
+ v = ldub(seg);
+ m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d1 */
+ m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d0 */
+ fpsrcop += ((CPU86_LDouble)m32i);
+ if ( ldub(seg+9) & 0x80 )
+ fpsrcop = -fpsrcop;
+ ST0 = fpsrcop;
+}
+
+void OPPROTO op_fbld_ST0_A0(void)
+{
+ helper_fbld_ST0_A0();
+}
+
+void helper_fbst_ST0_A0(void)
+{
+ CPU86_LDouble fptemp;
+ CPU86_LDouble fpsrcop;
+ int v;
+ uint8_t *mem_ref, *mem_end;
+
+ fpsrcop = rint(ST0);
+ mem_ref = (uint8_t *)A0;
+ mem_end = mem_ref + 8;
+ if ( fpsrcop < 0.0 ) {
+ stw(mem_end, 0x8000);
+ fpsrcop = -fpsrcop;
+ } else {
+ stw(mem_end, 0x0000);
+ }
+ while (mem_ref < mem_end) {
+ if (fpsrcop == 0.0)
+ break;
+ fptemp = floor(fpsrcop/10.0);
+ v = ((int)(fpsrcop - fptemp*10.0));
+ if (fptemp == 0.0) {
+ stb(mem_ref++, v);
+ break;
+ }
+ fpsrcop = fptemp;
+ fptemp = floor(fpsrcop/10.0);
+ v |= (((int)(fpsrcop - fptemp*10.0)) << 4);
+ stb(mem_ref++, v);
+ fpsrcop = fptemp;
+ }
+ while (mem_ref < mem_end) {
+ stb(mem_ref++, 0);
+ }
+}
+
+void OPPROTO op_fbst_ST0_A0(void)
+{
+ helper_fbst_ST0_A0();
+}
+
/* FPU move */
static inline void fpush(void)
FORCE_RET();
}
+/* XXX: handle nans */
+void OPPROTO op_fucom_ST0_FT0(void)
+{
+ env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
+ if (ST0 < FT0)
+ env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
+ else if (ST0 == FT0)
+ env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
+ FORCE_RET();
+}
+
void OPPROTO op_fadd_ST0_FT0(void)
{
ST0 += FT0;
ST0 = fabs(ST0);
}
-void OPPROTO op_fxam_ST0(void)
+void helper_fxam_ST0(void)
{
CPU86_LDoubleU temp;
int expdif;
} else {
env->fpus |= 0x400;
}
- FORCE_RET();
+}
+
+void OPPROTO op_fxam_ST0(void)
+{
+ helper_fxam_ST0();
}
void OPPROTO op_fld1_ST0(void)
ST0 = *(CPU86_LDouble *)&f15rk[1];
}
-void OPPROTO op_fld2t_ST0(void)
+void OPPROTO op_fldl2t_ST0(void)
{
ST0 = *(CPU86_LDouble *)&f15rk[6];
}
-void OPPROTO op_fld2e_ST0(void)
+void OPPROTO op_fldl2e_ST0(void)
{
ST0 = *(CPU86_LDouble *)&f15rk[5];
}
helper_fcos();
}
+void OPPROTO op_fnstsw_A0(void)
+{
+ int fpus;
+ fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
+ stw((void *)A0, fpus);
+}
+
+void OPPROTO op_fnstsw_EAX(void)
+{
+ int fpus;
+ fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
+ EAX = (EAX & 0xffff0000) | fpus;
+}
+
+void OPPROTO op_fnstcw_A0(void)
+{
+ stw((void *)A0, env->fpuc);
+}
+
+void OPPROTO op_fldcw_A0(void)
+{
+ int rnd_type;
+ env->fpuc = lduw((void *)A0);
+ /* set rounding mode */
+ switch(env->fpuc & RC_MASK) {
+ default:
+ case RC_NEAR:
+ rnd_type = FE_TONEAREST;
+ break;
+ case RC_DOWN:
+ rnd_type = FE_DOWNWARD;
+ break;
+ case RC_UP:
+ rnd_type = FE_UPWARD;
+ break;
+ case RC_CHOP:
+ rnd_type = FE_TOWARDZERO;
+ break;
+ }
+ fesetround(rnd_type);
+}
+
+void OPPROTO op_fclex(void)
+{
+ env->fpus &= 0x7f00;
+}
+
+void OPPROTO op_fninit(void)
+{
+ env->fpus = 0;
+ env->fpstt = 0;
+ env->fpuc = 0x37f;
+ env->fptags[0] = 1;
+ env->fptags[1] = 1;
+ env->fptags[2] = 1;
+ env->fptags[3] = 1;
+ env->fptags[4] = 1;
+ env->fptags[5] = 1;
+ env->fptags[6] = 1;
+ env->fptags[7] = 1;
+}
+
+/* threading support */
+void OPPROTO op_lock(void)
+{
+ cpu_lock();
+}
+
+void OPPROTO op_unlock(void)
+{
+ cpu_unlock();
+}
projects / qemu / blobdiff