Move interrupt_request and user_mode_only to common cpu state.

[qemu] / target-cris / cpu.h

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 49de830..39b1061 100644 (file)
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -29,12 +29,11 @@
 
 #define ELF_MACHINE    EM_CRIS
 
-#define EXCP_MMU_EXEC    0
-#define EXCP_MMU_READ    1
-#define EXCP_MMU_WRITE   2
-#define EXCP_MMU_FLUSH   3
-#define EXCP_MMU_FAULT   4
-#define EXCP_BREAK      16 /* trap.  */
+#define EXCP_NMI        1
+#define EXCP_GURU       2
+#define EXCP_BUSFAULT   3
+#define EXCP_IRQ        4
+#define EXCP_BREAK      5
 
 /* Register aliases. R0 - R15 */
 #define R_FP  8
@@ -54,11 +53,14 @@
 #define PR_EBP 9
 #define PR_ERP 10
 #define PR_SRP 11
+#define PR_NRP 12
 #define PR_CCS 13
 #define PR_USP 14
 #define PR_SPC 15
 
 /* CPU flags.  */
+#define Q_FLAG 0x80000000
+#define M_FLAG 0x40000000
 #define S_FLAG 0x200
 #define R_FLAG 0x100
 #define P_FLAG 0x80
@@ -107,11 +109,10 @@ typedef struct CPUCRISState {
        /* Pseudo register for the kernel stack.  */
        uint32_t ksp;
 
-       /* These are setup up by the guest code just before transfering the
-          control back to the host.  */
-       int jmp;
-       uint32_t btarget;
+       /* Branch.  */
+       int dslot;
        int btaken;
+       uint32_t btarget;
 
        /* Condition flag tracking.  */
        uint32_t cc_op;
@@ -119,31 +120,15 @@ typedef struct CPUCRISState {
        uint32_t cc_dest;
        uint32_t cc_src;
        uint32_t cc_result;
-
        /* size of the operation, 1 = byte, 2 = word, 4 = dword.  */
        int cc_size;
-
-       /* Extended arithmetics.  */
-       int cc_x_live;
+       /* X flag at the time of cc snapshot.  */
        int cc_x;
 
-       int exception_index;
-       int interrupt_request;
        int interrupt_vector;
        int fault_vector;
        int trap_vector;
 
-       uint32_t debug1;
-       uint32_t debug2;
-       uint32_t debug3;
-
-       struct
-       {
-               int exec_insns;
-               int exec_loads;
-               int exec_stores;
-       } stats;
-
        /* FIXME: add a check in the translator to avoid writing to support
           register sets beyond the 4th. The ISA allows up to 256! but in
           practice there is no core that implements more than 4.
@@ -153,6 +138,11 @@ typedef struct CPUCRISState {
        */
        uint32_t sregs[4][16];
 
+       /* Linear feedback shift reg in the mmu. Used to provide pseudo
+          randomness for the 'hint' the mmu gives to sw for chosing valid
+          sets on TLB refills.  */
+       uint32_t mmu_rand_lfsr;
+
        /*
         * We just store the stores to the tlbset here for later evaluation
         * when the hw needs access to them.
@@ -165,11 +155,6 @@ typedef struct CPUCRISState {
                uint32_t lo;
        } tlbsets[2][4][16];
 
-       int features;
-       int user_mode_only;
-       int halted;
-
-       jmp_buf jmp_env;
        CPU_COMMON
 } CPUCRISState;
 
@@ -182,20 +167,14 @@ void do_interrupt(CPUCRISState *env);
    is returned if the signal was handled by the virtual CPU.  */
 int cpu_cris_signal_handler(int host_signum, void *pinfo,
                            void *puc);
-void cpu_cris_flush_flags(CPUCRISState *, int);
-
-
 void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
                           int is_asi);
 
 enum {
     CC_OP_DYNAMIC, /* Use env->cc_op  */
     CC_OP_FLAGS,
-    CC_OP_LOGIC,
     CC_OP_CMP,
     CC_OP_MOVE,
-    CC_OP_MOVE_PD,
-    CC_OP_MOVE_SD,
     CC_OP_ADD,
     CC_OP_ADDC,
     CC_OP_MCP,
@@ -218,32 +197,6 @@ enum {
     CC_OP_LZ
 };
 
-#define CCF_C 0x01
-#define CCF_V 0x02
-#define CCF_Z 0x04
-#define CCF_N 0x08
-#define CCF_X 0x10
-
-#define CRIS_SSP    0
-#define CRIS_USP    1
-
-void cris_set_irq_level(CPUCRISState *env, int level, uint8_t vector);
-void cris_set_macsr(CPUCRISState *env, uint32_t val);
-void cris_switch_sp(CPUCRISState *env);
-
-void do_cris_semihosting(CPUCRISState *env, int nr);
-
-enum cris_features {
-    CRIS_FEATURE_CF_ISA_MUL,
-};
-
-static inline int cris_feature(CPUCRISState *env, int feature)
-{
-    return (env->features & (1u << feature)) != 0;
-}
-
-void register_cris_insns (CPUCRISState *env);
-
 /* CRIS uses 8k pages.  */
 #define TARGET_PAGE_BITS 13
 #define MMAP_SHIFT TARGET_PAGE_BITS
@@ -254,6 +207,8 @@ void register_cris_insns (CPUCRISState *env);
 #define cpu_gen_code cpu_cris_gen_code
 #define cpu_signal_handler cpu_cris_signal_handler
 
+#define CPU_SAVE_VERSION 1
+
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
@@ -263,6 +218,15 @@ static inline int cpu_mmu_index (CPUState *env)
        return !!(env->pregs[PR_CCS] & U_FLAG);
 }
 
+#if defined(CONFIG_USER_ONLY)
+static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+{
+    if (newsp)
+        env->regs[14] = newsp;
+    env->regs[10] = 0;
+}
+#endif
+
 /* Support function regs.  */
 #define SFR_RW_GC_CFG      0][0
 #define SFR_RW_MM_CFG      env->pregs[PR_SRS]][0
@@ -273,5 +237,7 @@ static inline int cpu_mmu_index (CPUState *env)
 #define SFR_RW_MM_TLB_LO   env->pregs[PR_SRS]][5
 #define SFR_RW_MM_TLB_HI   env->pregs[PR_SRS]][6
 
+#define CPU_PC_FROM_TB(env, tb) env->pc = tb->pc
+
 #include "cpu-all.h"
 #endif