vmstate: port vmmouse device

[qemu] / target-m68k / translate.c

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 49e2cb2..b37578b 100644 (file)
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -15,15 +15,13 @@
  * General Public License for more details.
  *
  * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 #include <stdarg.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
 #include <inttypes.h>
-#include <assert.h>
 
 #include "config.h"
 #include "cpu.h"
@@ -165,7 +163,7 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
 #define DISAS_INSN(name) \
   static void real_disas_##name (DisasContext *s, uint16_t insn); \
   static void disas_##name (DisasContext *s, uint16_t insn) { \
-    if (logfile) fprintf(logfile, "Dispatch " #name "\n"); \
+    qemu_log("Dispatch " #name "\n"); \
     real_disas_##name(s, insn); } \
   static void real_disas_##name (DisasContext *s, uint16_t insn)
 #else
@@ -503,7 +501,7 @@ static inline TCGv gen_extend(TCGv val, int opsize, int sign)
 }
 
 /* Generate code for an "effective address".  Does not adjust the base
-   register for autoincrememnt addressing modes.  */
+   register for autoincrement addressing modes.  */
 static TCGv gen_lea(DisasContext *s, uint16_t insn, int opsize)
 {
     TCGv reg;
@@ -1247,7 +1245,7 @@ DISAS_INSN(byterev)
     TCGv reg;
 
     reg = DREG(insn, 0);
-    tcg_gen_bswap_i32(reg, reg);
+    tcg_gen_bswap32_i32(reg, reg);
 }
 
 DISAS_INSN(move)
@@ -2141,9 +2139,10 @@ DISAS_INSN(fpu)
             break;
         case 5: /* OS_DOUBLE */
             tcg_gen_mov_i32(tmp32, AREG(insn, 0));
-            switch (insn >> 3) {
+            switch ((insn >> 3) & 7) {
             case 2:
             case 3:
+                break;
             case 4:
                 tcg_gen_addi_i32(tmp32, tmp32, -8);
                 break;
@@ -2156,7 +2155,7 @@ DISAS_INSN(fpu)
                 goto undef;
             }
             gen_store64(s, tmp32, src);
-            switch (insn >> 3) {
+            switch ((insn >> 3) & 7) {
             case 3:
                 tcg_gen_addi_i32(tmp32, tmp32, 8);
                 tcg_gen_mov_i32(AREG(insn, 0), tmp32);
@@ -2236,7 +2235,7 @@ DISAS_INSN(fpu)
                 }
                 mask >>= 1;
             }
-            tcg_temp_free_i32(tmp32);
+            tcg_temp_free_i32(addr);
         }
         return;
     }
@@ -2254,9 +2253,10 @@ DISAS_INSN(fpu)
         if (opsize == OS_DOUBLE) {
             tmp32 = tcg_temp_new_i32();
             tcg_gen_mov_i32(tmp32, AREG(insn, 0));
-            switch (insn >> 3) {
+            switch ((insn >> 3) & 7) {
             case 2:
             case 3:
+                break;
             case 4:
                 tcg_gen_addi_i32(tmp32, tmp32, -8);
                 break;
@@ -2275,7 +2275,7 @@ DISAS_INSN(fpu)
                 goto undef;
             }
             src = gen_load64(s, tmp32);
-            switch (insn >> 3) {
+            switch ((insn >> 3) & 7) {
             case 3:
                 tcg_gen_addi_i32(tmp32, tmp32, 8);
                 tcg_gen_mov_i32(AREG(insn, 0), tmp32);
@@ -2999,8 +2999,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
     do {
         pc_offset = dc->pc - pc_start;
         gen_throws_exception = NULL;
-        if (unlikely(env->breakpoints)) {
-            for (bp = env->breakpoints; bp != NULL; bp = bp->next) {
+        if (unlikely(!TAILQ_EMPTY(&env->breakpoints))) {
+            TAILQ_FOREACH(bp, &env->breakpoints, entry) {
                 if (bp->pc == dc->pc) {
                     gen_exception(dc, dc->pc, EXCP_DEBUG);
                     dc->is_jmp = DISAS_JUMP;
@@ -3027,14 +3027,9 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
         dc->insn_pc = dc->pc;
        disas_m68k_insn(env, dc);
         num_insns++;
-
-        /* Terminate the TB on memory ops if watchpoints are present.  */
-        /* FIXME: This should be replaced by the deterministic execution
-         * IRQ raising bits.  */
-        if (dc->is_mem && env->watchpoints)
-            break;
     } while (!dc->is_jmp && gen_opc_ptr < gen_opc_end &&
              !env->singlestep_enabled &&
+             !singlestep &&
              (pc_offset) < (TARGET_PAGE_SIZE - 32) &&
              num_insns < max_insns);
 
@@ -3069,11 +3064,11 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
     *gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
-        fprintf(logfile, "----------------\n");
-        fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
-        target_disas(logfile, pc_start, dc->pc - pc_start, 0);
-        fprintf(logfile, "\n");
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+        qemu_log("----------------\n");
+        qemu_log("IN: %s\n", lookup_symbol(pc_start));
+        log_target_disas(pc_start, dc->pc - pc_start, 0);
+        qemu_log("\n");
     }
 #endif
     if (search_pc) {