Move interrupt_request and user_mode_only to common cpu state.

[qemu] / target-mips / cpu.h

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 8e21f6b..e747bc8 100644 (file)
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -411,9 +411,7 @@ struct CPUMIPSState {
     /* We waste some space so we can handle shadow registers like TCs. */
     TCState tcs[MIPS_SHADOW_SET_MAX];
     /* Qemu */
-    int interrupt_request;
     int error_code;
-    int user_mode_only; /* user mode only simulation */
     uint32_t hflags;    /* CPU State */
     /* TMASK defines different execution modes */
 #define MIPS_HFLAG_TMASK  0x01FF
@@ -489,6 +487,8 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
 #define cpu_signal_handler cpu_mips_signal_handler
 #define cpu_list mips_cpu_list
 
+#define CPU_SAVE_VERSION 3
+
 /* MMU modes definitions. We carefully match the indices with our
    hflags layout. */
 #define MMU_MODE0_SUFFIX _kernel