Make MIPS MT implementation more cache friendly.

[qemu] / target-mips / op_template.c

diff --git a/target-mips/op_template.c b/target-mips/op_template.c
index 48b91e1..c683330 100644 (file)
--- a/target-mips/op_template.c
+++ b/target-mips/op_template.c
@@ -21,31 +21,31 @@
 #if defined(REG)
 void glue(op_load_gpr_T0_gpr, REG) (void)
 {
-    T0 = env->gpr[REG][env->current_tc];
+    T0 = env->gpr[env->current_tc][REG];
     FORCE_RET();
 }
 
 void glue(op_store_T0_gpr_gpr, REG) (void)
 {
-    env->gpr[REG][env->current_tc] = T0;
+    env->gpr[env->current_tc][REG] = T0;
     FORCE_RET();
 }
 
 void glue(op_load_gpr_T1_gpr, REG) (void)
 {
-    T1 = env->gpr[REG][env->current_tc];
+    T1 = env->gpr[env->current_tc][REG];
     FORCE_RET();
 }
 
 void glue(op_store_T1_gpr_gpr, REG) (void)
 {
-    env->gpr[REG][env->current_tc] = T1;
+    env->gpr[env->current_tc][REG] = T1;
     FORCE_RET();
 }
 
 void glue(op_load_gpr_T2_gpr, REG) (void)
 {
-    T2 = env->gpr[REG][env->current_tc];
+    T2 = env->gpr[env->current_tc][REG];
     FORCE_RET();
 }