gen_helper_raise_exception_err(texcp, terr);
tcg_temp_free_i32(terr);
tcg_temp_free_i32(texcp);
- gen_helper_interrupt_restart();
- tcg_gen_exit_tb(0);
}
static inline void
{
save_cpu_state(ctx, 1);
gen_helper_0i(raise_exception, excp);
- gen_helper_interrupt_restart();
- tcg_gen_exit_tb(0);
}
/* Addresses computation */
tcg_temp_free(t2);
tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
tcg_temp_free(t1);
- /* operands of same sign, result different sign */
+ /* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
gen_store_gpr(t0, rd);
tcg_temp_free(t2);
tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
tcg_temp_free(t1);
- /* operands of same sign, result different sign */
+ /* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
gen_store_gpr(t0, rd);
const char *opn = "extended float load/store";
int store = 0;
TCGv t0 = tcg_temp_new();
- TCGv t1 = tcg_temp_new();
if (base == 0) {
gen_load_gpr(t0, index);
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- tcg_gen_qemu_ld32s(t1, t0, ctx->mem_idx);
- tcg_gen_trunc_tl_i32(fp0, t1);
+ tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
+ tcg_gen_trunc_tl_i32(fp0, t0);
gen_store_fpr32(fp0, fd);
tcg_temp_free_i32(fp0);
}
check_cop1x(ctx);
{
TCGv_i32 fp0 = tcg_temp_new_i32();
+ TCGv t1 = tcg_temp_new();
gen_load_fpr32(fp0, fs);
tcg_gen_extu_i32_tl(t1, fp0);
tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
tcg_temp_free_i32(fp0);
+ tcg_temp_free(t1);
}
opn = "swxc1";
store = 1;
break;
}
tcg_temp_free(t0);
- tcg_temp_free(t1);
MIPS_DEBUG("%s %s, %s(%s)", opn, fregnames[store ? fs : fd],
regnames[index], regnames[base]);
}
env->cpu_model_str = cpu_model;
mips_tcg_init();
cpu_reset(env);
+ qemu_init_vcpu(env);
return env;
}
/* Minimal init */
#if defined(CONFIG_USER_ONLY)
env->hflags = MIPS_HFLAG_UM;
+ /* Enable access to the SYNCI_Step register. */
+ env->CP0_HWREna |= (1 << 1);
#else
if (env->hflags & MIPS_HFLAG_BMASK) {
/* If the exception was raised from a delay slot,