Implement and use shared memory framebuffer device rendering reoutine.

[qemu] / target-sh4 / cpu.h

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index ec4aace..aea7108 100644 (file)
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -15,7 +15,7 @@
  *
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 #ifndef _CPU_SH4_H
 #define _CPU_SH4_H
@@ -37,6 +37,8 @@
 #define SH_CPU_SH7750_ALL (SH_CPU_SH7750 | SH_CPU_SH7750S | SH_CPU_SH7750R)
 #define SH_CPU_SH7751_ALL (SH_CPU_SH7751 | SH_CPU_SH7751R)
 
+#define CPUState struct CPUSH4State
+
 #include "cpu-defs.h"
 
 #include "softfloat.h"
@@ -49,6 +51,10 @@
 #define SR_FD (1 << 15)
 #define SR_M  (1 << 9)
 #define SR_Q  (1 << 8)
+#define SR_I3 (1 << 7)
+#define SR_I2 (1 << 6)
+#define SR_I1 (1 << 5)
+#define SR_I0 (1 << 4)
 #define SR_S  (1 << 1)
 #define SR_T  (1 << 0)
 
@@ -91,6 +97,7 @@ typedef struct tlb_t {
 
 enum sh_features {
     SH_FEATURE_SH4A = 1,
+    SH_FEATURE_BCR3_AND_BCR4 = 2,
 };
 
 typedef struct CPUSH4State {
@@ -135,6 +142,8 @@ typedef struct CPUSH4State {
     uint32_t prr;              /* Processor Revision Register */
     uint32_t cvr;              /* Cache Version Register */
 
+    uint32_t ldst;
+
      CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */
     tlb_t itlb[ITLB_SIZE];     /* instruction translation table */
     void *intc_handle;
@@ -158,9 +167,10 @@ static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls)
   env->gbr = newtls;
 }
 
+void cpu_load_tlb(CPUSH4State * env);
+
 #include "softfloat.h"
 
-#define CPUState CPUSH4State
 #define cpu_init cpu_sh4_init
 #define cpu_exec cpu_sh4_exec
 #define cpu_gen_code cpu_sh4_gen_code