Correct 32bit carry flag for add instruction (Igor Kovalenko)

[qemu] / target-sparc / cpu.h

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 676aac6..2574690 100644 (file)
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -61,12 +61,13 @@
 #define TT_DIV_ZERO 0x28
 #define TT_DFAULT   0x30
 #define TT_DATA_ACCESS 0x32
-#define TT_DPROT    0x33
 #define TT_UNALIGNED 0x34
 #define TT_PRIV_ACT 0x37
 #define TT_EXTINT   0x40
+#define TT_IVEC     0x60
 #define TT_TMISS    0x64
 #define TT_DMISS    0x68
+#define TT_DPROT    0x6c
 #define TT_SPILL    0x80
 #define TT_FILL     0xc0
 #define TT_WOTHER   0x10
@@ -251,13 +252,15 @@ typedef struct CPUSPARCState {
     float128 qt0, qt1;
     float_status fp_status;
 #if defined(TARGET_SPARC64)
-#define MAXTL 4
+#define MAXTL_MAX 8
+#define MAXTL_MASK (MAXTL_MAX - 1)
     trap_state *tsptr;
-    trap_state ts[MAXTL];
+    trap_state ts[MAXTL_MAX];
     uint32_t xcc;               /* Extended integer condition codes */
     uint32_t asi;
     uint32_t pstate;
     uint32_t tl;
+    uint32_t maxtl;
     uint32_t cansave, canrestore, otherwin, wstate, cleanwin;
     uint64_t agregs[8]; /* alternate general registers */
     uint64_t bgregs[8]; /* backup for normal global registers */
@@ -269,7 +272,7 @@ typedef struct CPUSPARCState {
     uint64_t gsr;
     uint32_t gl; // UA2005
     /* UA 2005 hyperprivileged registers */
-    uint64_t hpstate, htstate[MAXTL], hintp, htba, hver, hstick_cmpr, ssr;
+    uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
     void *hstick; // UA 2005
 #endif
     uint32_t features;
@@ -396,7 +399,7 @@ void cpu_check_irqs(CPUSPARCState *env);
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_list sparc_cpu_list
 
-#define CPU_SAVE_VERSION 4
+#define CPU_SAVE_VERSION 5
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _user