register struct CPUSPARCState *env asm(AREG0);
-#define FT0 (env->ft0)
-#define FT1 (env->ft1)
#define DT0 (env->dt0)
#define DT1 (env->dt1)
#define QT0 (env->qt0)
{
}
-int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
- int mmu_idx, int is_softmmu);
+/* op_helper.c */
void do_interrupt(CPUState *env);
+static inline int cpu_has_work(CPUState *env1)
+{
+ return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (env1->psret != 0);
+}
+
+
static inline int cpu_halted(CPUState *env1) {
if (!env1->halted)
return 0;
- if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) {
+ if (cpu_has_work(env1)) {
env1->halted = 0;
return 0;
}