static uint16_t **gen_fprf_ptr;
#endif
-static always_inline void gen_set_T0 (target_ulong val)
-{
-#if defined(TARGET_PPC64)
- if (val >> 32)
- gen_op_set_T0_64(val >> 32, val);
- else
-#endif
- gen_op_set_T0(val);
-}
-
-static always_inline void gen_set_T1 (target_ulong val)
-{
-#if defined(TARGET_PPC64)
- if (val >> 32)
- gen_op_set_T1_64(val >> 32, val);
- else
-#endif
- gen_op_set_T1(val);
-}
-
#define GEN8(func, NAME) \
static GenOpFunc *NAME ## _table [8] = { \
NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \
if (rA(ctx->opcode) == 0) {
/* li case */
- gen_set_T0(simm);
+ tcg_gen_movi_tl(cpu_T[0], simm);
} else {
gen_op_load_gpr_T0(rA(ctx->opcode));
if (likely(simm != 0))
if (rA(ctx->opcode) == 0) {
/* lis case */
- gen_set_T0(simm << 16);
+ tcg_gen_movi_tl(cpu_T[0], simm << 16);
} else {
gen_op_load_gpr_T0(rA(ctx->opcode));
if (likely(simm != 0))
uint32_t mask;
if (rA(ctx->opcode) == 0) {
- gen_set_T0(0);
+ tcg_gen_movi_tl(cpu_T[0], 0);
} else {
gen_op_load_gpr_T1(rA(ctx->opcode));
}
simm &= ~maskl;
if (rA(ctx->opcode) == 0) {
- gen_set_T0(simm);
+ tcg_gen_movi_tl(cpu_T[0], simm);
} else {
gen_op_load_gpr_T0(rA(ctx->opcode));
if (likely(simm != 0))
if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) &&
likely(!ctx->singlestep_enabled)) {
tcg_gen_goto_tb(n);
- gen_set_T1(dest);
+ tcg_gen_movi_tl(cpu_T[1], dest);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_b_T1_64();
gen_op_b_T1();
tcg_gen_exit_tb((long)tb + n);
} else {
- gen_set_T1(dest);
+ tcg_gen_movi_tl(cpu_T[1], dest);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_b_T1_64();
GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
{
gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_set_T1(SIMM(ctx->opcode));
+ tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
gen_op_tw(TO(ctx->opcode));
GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B)
{
gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_set_T1(SIMM(ctx->opcode));
+ tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
gen_op_td(TO(ctx->opcode));
target_long simm = rB(ctx->opcode);
if (rA(ctx->opcode) == 0) {
- gen_set_T0(simm << sh);
+ tcg_gen_movi_tl(cpu_T[0], simm << sh);
} else {
gen_op_load_gpr_T0(rA(ctx->opcode));
if (likely(simm != 0))