let beagleboard understand the -m switch

make it possible to define amount of SDRAM dynamically on commandline. however this patch will still put all the ram on cs0. also removed the unknown 80kb rom block and use only the publicly defined 32kb boot rom area.

diff --git a/hw/beagle.c b/hw/beagle.c
index ed4a927..ddceefd 100644 (file)
--- a/hw/beagle.c
+++ b/hw/beagle.c
@@ -55,12 +55,7 @@ static void beagle_init(ram_addr_t ram_size, int vga_ram_size,
         fprintf(stderr, "%s: missing SecureDigital device\n", __FUNCTION__);
         exit(1);
     }
-       if (ram_size < (beagle_machine.ram_require & ~RAMSIZE_FIXED)) {
-        fprintf(stderr, "%s: This architecture uses %lu bytes of memory\n",
-                __FUNCTION__, (beagle_machine.ram_require & ~RAMSIZE_FIXED));
-        exit(1);
-    }
-       s->cpu = omap3530_mpu_init(BEAGLE_SDRAM_SIZE, NULL);
+       s->cpu = omap3530_mpu_init(ram_size, NULL);
     
     if (serial_hds[0])
         omap_uart_attach(s->cpu->uart[2], serial_hds[0]);
@@ -83,8 +78,6 @@ QEMUMachine beagle_machine = {
     .name =        "beagle",
     .desc =        "Beagle board (OMAP3530)",
     .init =        beagle_init,
-    .ram_require = (BEAGLE_SDRAM_SIZE
-                    + OMAP3XXX_SRAM_SIZE
-                    + OMAP3XXX_BOOTROM_SIZE) | RAMSIZE_FIXED,
+    .ram_require = OMAP3XXX_SRAM_SIZE + OMAP3XXX_BOOTROM_SIZE,
 };
 

diff --git a/hw/omap.h b/hw/omap.h
index e186491..9972238 100644 (file)
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -50,7 +50,7 @@
 # define OMAP242X_SRAM_SIZE     0x000a0000
 # define OMAP243X_SRAM_SIZE     0x00010000
 # define OMAP3XXX_SRAM_SIZE     0x00010000
-# define OMAP3XXX_BOOTROM_SIZE  0x0001C000
+# define OMAP3XXX_BOOTROM_SIZE  0x00008000
 # define OMAP_CS0_SIZE          0x04000000
 # define OMAP_CS1_SIZE          0x04000000
 # define OMAP_CS2_SIZE          0x04000000

diff --git a/hw/omap2.c b/hw/omap2.c
index 38cd6de..00fe864 100644 (file)
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -4109,9 +4109,10 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
         break;
 
     case 0x10: /* SDRC_SYSCONFIG */
-        if ((value >> 3) != 0x2)
+        /* ignore invalid idle mode settings */
+        /*if ((value >> 3) != 0x2)
             fprintf(stderr, "%s: bad SDRAM idle mode %i for SDRC_SYSCONFIG (full value 0x%08x)\n",
-                            __FUNCTION__, value >> 3, value);
+                            __FUNCTION__, value >> 3, value);*/
         if (value & 2)
             omap_sdrc_reset(s);
         s->config = value & 0x18;
@@ -4119,7 +4120,6 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
 
     case 0x40: /* SDRC_CS_CFG */
         s->cscfg = value & 0x30f;
-        fprintf(stderr, "%s: SDRC_CS_CFG = 0x%08x\n", __FUNCTION__, s->cscfg);
         break;
 
     case 0x44: /* SDRC_SHARING */
@@ -4136,7 +4136,8 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
         break;
 
     case 0x68: /* SDRC_DLLB_CTRL */
-        OMAP_BAD_REGV(addr, value);
+        /* silently ignore */
+        /*OMAP_BAD_REGV(addr, value);*/
         break;
         
     case 0x70: /* SDRC_POWER_REG */

diff --git a/hw/omap3.c b/hw/omap3.c
index 0160b0b..918997a 100644 (file)
--- a/hw/omap3.c
+++ b/hw/omap3.c
@@ -3756,7 +3756,7 @@ struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
     cpu_register_physical_memory(OMAP3_SRAM_BASE, s->sram_size,
                                  sram_base | IO_MEM_RAM);
     bootrom_base = qemu_ram_alloc(OMAP3XXX_BOOTROM_SIZE);
-    cpu_register_physical_memory(OMAP3_Q1_BASE, OMAP3_BOOT_ROM_SIZE,
+    cpu_register_physical_memory(OMAP3_Q1_BASE + 0x14000, OMAP3_BOOT_ROM_SIZE,
                                  bootrom_base | IO_MEM_ROM);
     cpu_register_physical_memory(0, OMAP3_BOOT_ROM_SIZE,
                                  bootrom_base | IO_MEM_ROM);

diff --git a/hw/omap3_boot.c b/hw/omap3_boot.c
index 2626075..7586bed 100644 (file)
--- a/hw/omap3_boot.c
+++ b/hw/omap3_boot.c
@@ -59,22 +59,7 @@ struct omap3_nand_boot_desc_s {
     uint8_t bus16;
 };
 
-/* first 80kB (reserved section) */
-static const uint8_t omap3_boot_rom_block1[] = { /* 0x40000000-0x40013fff */
-    /* this gets mapped to zero at power-up so let's have a branch
-     * table to the upper block ROM exception vectors here */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014000 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014004 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014008 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x4001400c */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014010 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014014 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x40014018 */
-    0xfe, 0x4f, 0x00, 0xea, /* b 0x4001401c */
-};
-
-/* upper 32kB */
-static const uint8_t omap3_boot_rom_block2[] = { /* 0x40014000-0x4001bfff */
+static const uint8_t omap3_boot_rom[] = { /* 0x40014000-0x4001bfff */
     /* 0x40014000: ROM Exception vectors */
     0x3e, 0x00, 0x00, 0xea, /* b 0x40014100 */
     0x18, 0xf0, 0x9f, 0xe5, /* ldr pc, [pc, #0x18] */
@@ -796,12 +781,9 @@ void omap3_boot_rom_emu(struct omap_mpu_state_s *s)
     uint8_t x[4] = {0, 0, 0, 0};
     int result = 0;
     
-    cpu_physical_memory_write_rom(OMAP3_Q1_BASE,
-                                  omap3_boot_rom_block1,
-                                  sizeof(omap3_boot_rom_block1));
     cpu_physical_memory_write_rom(OMAP3_Q1_BASE + 0x14000,
-                                  omap3_boot_rom_block2,
-                                  sizeof(omap3_boot_rom_block2));
+                                  omap3_boot_rom,
+                                  sizeof(omap3_boot_rom));
     cpu_physical_memory_write_rom(OMAP3_Q1_BASE + 0x1bffc,
                                   rom_version,
                                   sizeof(rom_version));