pic_set_irq(13, 0);
}
+/* TSC handling */
+
+uint64_t cpu_get_tsc(CPUX86State *env)
+{
+ return qemu_get_clock(vm_clock);
+}
+
/* PC cmos mappings */
#define REG_EQUIPMENT_BYTE 0x14
return -1;
}
+/* timers for rdtsc */
+
+#if defined(__i386__)
+
+int64_t cpu_get_real_ticks(void)
+{
+ int64_t val;
+ asm volatile ("rdtsc" : "=A" (val));
+ return val;
+}
+
+#elif defined(__x86_64__)
+
+int64_t cpu_get_real_ticks(void)
+{
+ uint32_t low,high;
+ int64_t val;
+ asm volatile("rdtsc" : "=a" (low), "=d" (high));
+ val = high;
+ val <<= 32;
+ val |= low;
+ return val;
+}
+
+#else
+
+static uint64_t emu_time;
+
+int64_t cpu_get_real_ticks(void)
+{
+ return emu_time++;
+}
+
+#endif
+
#ifdef TARGET_I386
/***********************************************************/
/* CPUX86 core interface */
+uint64_t cpu_get_tsc(CPUX86State *env)
+{
+ return cpu_get_real_ticks();
+}
+
static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
int flags)
{
void *puc);
void cpu_x86_set_a20(CPUX86State *env, int a20_state);
+uint64_t cpu_get_tsc(CPUX86State *env);
+
/* will be suppressed */
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
cpu_x86_flush_tlb(env, addr);
}
-/* rdtsc */
-#if !defined(__i386__) && !defined(__x86_64__)
-uint64_t emu_time;
-#endif
-
void helper_rdtsc(void)
{
uint64_t val;
-#if defined(__i386__) || defined(__x86_64__)
- asm volatile ("rdtsc" : "=A" (val));
-#else
- /* better than nothing: the time increases */
- val = emu_time++;
-#endif
+
+ val = cpu_get_tsc(env);
EAX = val;
EDX = val >> 32;
}
return -1;
}
+uint64_t cpu_get_tsc(CPUState *env)
+{
+ return 0;
+}
+
static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
unsigned long addr, unsigned int sel)
{