case VBE_DISPI_INDEX_ID:
if (val == VBE_DISPI_ID0 ||
val == VBE_DISPI_ID1 ||
- val == VBE_DISPI_ID2) {
+ val == VBE_DISPI_ID2 ||
+ val == VBE_DISPI_ID3 ||
+ val == VBE_DISPI_ID4) {
s->vbe_regs[s->vbe_index] = val;
}
break;
/* XXX: the bios should do that */
s->bank_offset = 0;
}
+ s->dac_8bit = (val & VBE_DISPI_8BIT_DAC) > 0;
s->vbe_regs[s->vbe_index] = val;
break;
case VBE_DISPI_INDEX_VIRT_WIDTH:
palette = s->last_palette;
v = 0;
for(i = 0; i < 256; i++) {
- col = s->rgb_to_pixel(c6_to_8(s->palette[v]),
- c6_to_8(s->palette[v + 1]),
- c6_to_8(s->palette[v + 2]));
+ if (s->dac_8bit) {
+ col = s->rgb_to_pixel(s->palette[v],
+ s->palette[v + 1],
+ s->palette[v + 2]);
+ } else {
+ col = s->rgb_to_pixel(c6_to_8(s->palette[v]),
+ c6_to_8(s->palette[v + 1]),
+ c6_to_8(s->palette[v + 2]));
+ }
if (col != palette[i]) {
full_update = 1;
palette[i] = col;
#define VBE_DISPI_ID0 0xB0C0
#define VBE_DISPI_ID1 0xB0C1
#define VBE_DISPI_ID2 0xB0C2
+#define VBE_DISPI_ID3 0xB0C3
+#define VBE_DISPI_ID4 0xB0C4
#define VBE_DISPI_DISABLED 0x00
#define VBE_DISPI_ENABLED 0x01
uint8_t dac_read_index; \
uint8_t dac_write_index; \
uint8_t dac_cache[3]; /* used when writing */ \
+ int dac_8bit; \
uint8_t palette[768]; \
int32_t bank_offset; \
int (*get_bpp)(struct VGAState *s); \