#include "ppc_mac.h"
struct MacIONVRAMState {
+ target_phys_addr_t mem_base;
+ target_phys_addr_t size;
+ int mem_index;
uint8_t data[0x2000];
};
target_phys_addr_t addr, uint32_t value)
{
MacIONVRAMState *s = opaque;
+
+ addr -= s->mem_base;
addr = (addr >> 4) & 0x1fff;
s->data[addr] = value;
// printf("macio_nvram_writeb %04x = %02x\n", addr, value);
MacIONVRAMState *s = opaque;
uint32_t value;
+ addr -= s->mem_base;
addr = (addr >> 4) & 0x1fff;
value = s->data[addr];
// printf("macio_nvram_readb %04x = %02x\n", addr, value);
&macio_nvram_readb,
};
-MacIONVRAMState *macio_nvram_init (int *mem_index)
+MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
{
MacIONVRAMState *s;
+
s = qemu_mallocz(sizeof(MacIONVRAMState));
if (!s)
return NULL;
- *mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
+ s->size = size;
+ s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
+ *mem_index = s->mem_index;
return s;
}
+void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
+{
+ MacIONVRAMState *s;
+
+ s = opaque;
+ s->mem_base = mem_base;
+ cpu_register_physical_memory(mem_base, s->size, s->mem_index);
+}
+
static uint8_t nvram_chksum (const uint8_t *buf, int n)
{
int sum, i;
int pic_mem_index;
int dbdma_mem_index;
int cuda_mem_index;
- int nvram_mem_index;
+ void *nvram;
int nb_ide;
int ide_mem_index[4];
};
macio_state->ide_mem_index[i]);
}
}
- if (macio_state->nvram_mem_index >= 0) {
- cpu_register_physical_memory(addr + 0x60000, 0x20000,
- macio_state->nvram_mem_index);
- }
+ if (macio_state->nvram != NULL)
+ macio_nvram_map(macio_state->nvram, addr + 0x60000);
}
void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
- int dbdma_mem_index, int cuda_mem_index, int nvram_mem_index,
+ int dbdma_mem_index, int cuda_mem_index, void *nvram,
int nb_ide, int *ide_mem_index)
{
PCIDevice *d;
macio_state->pic_mem_index = pic_mem_index;
macio_state->dbdma_mem_index = dbdma_mem_index;
macio_state->cuda_mem_index = cuda_mem_index;
- macio_state->nvram_mem_index = nvram_mem_index;
+ macio_state->nvram = nvram;
if (nb_ide > 4)
nb_ide = 4;
macio_state->nb_ide = nb_ide;
dbdma_init(&dbdma_mem_index);
macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
- cuda_mem_index, -1, 2, ide_mem_index);
+ cuda_mem_index, NULL, 2, ide_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, 3, -1);
graphic_depth = 15;
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
/* The NewWorld NVRAM is not located in the MacIO device */
- nvr = macio_nvram_init(&nvram_mem_index);
+ nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
pmac_format_nvram_partition(nvr, 0x2000);
- cpu_register_physical_memory(0xFFF04000, 0x20000, nvram_mem_index);
+ macio_nvram_map(nvr, 0xFFF04000);
nvram.opaque = nvr;
nvram.read_fn = &macio_nvram_read;
nvram.write_fn = &macio_nvram_write;
/* MacIO */
void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
- int dbdma_mem_index, int cuda_mem_index, int nvram_mem_index,
+ int dbdma_mem_index, int cuda_mem_index, void *nvram,
int nb_ide, int *ide_mem_index);
/* NewWorld PowerMac IDE */
/* Mac NVRAM */
typedef struct MacIONVRAMState MacIONVRAMState;
-MacIONVRAMState *macio_nvram_init (int *mem_index);
+MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size);
+void macio_nvram_map (void *opaque, target_phys_addr_t mem_base);
void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
uint32_t macio_nvram_read (void *opaque, uint32_t addr);
void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
- nvr = macio_nvram_init(&nvram_mem_index);
+ nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
pmac_format_nvram_partition(nvr, 0x2000);
dbdma_init(&dbdma_mem_index);
macio_init(pci_bus, 0x0017, 1, pic_mem_index, dbdma_mem_index,
- cuda_mem_index, nvram_mem_index, 0, NULL);
+ cuda_mem_index, nvr, 0, NULL);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, 3, -1);