Fix CP0_IntCtl handling.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-mips/op.c b/target-mips/op.c
index 4eb8a89..026b08a 100644 (file)
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -1374,8 +1374,9 @@ void op_mtc0_status (void)
 
 void op_mtc0_intctl (void)
 {
-    /* vectored interrupts not implemented */
-    env->CP0_IntCtl = 0;
+    /* vectored interrupts not implemented, timer on int 7,
+       no performance counters. */
+    env->CP0_IntCtl |= T0 & 0x000002e0;
     RETURN();
 }
 

diff --git a/target-mips/translate.c b/target-mips/translate.c
index a1af8ab..0d9226a 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -5405,6 +5405,9 @@ void cpu_reset (CPUMIPSState *env)
     /* SMP not implemented */
     env->CP0_EBase = 0x80000000;
     env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
+    /* vectored interrupts not implemented, timer on int 7,
+       no performance counters. */
+    env->CP0_IntCtl = 0xe0000000;
     env->CP0_WatchLo = 0;
     env->CP0_WatchHi = 0;
     /* Count register increments in debug mode, EJTAG version 1 */