/* fadd - fadd. */
void OPPROTO op_fadd (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fadd();
#else
FT0 = float64_add(FT0, FT1, &env->fp_status);
/* fsub - fsub. */
void OPPROTO op_fsub (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fsub();
#else
FT0 = float64_sub(FT0, FT1, &env->fp_status);
/* fmul - fmul. */
void OPPROTO op_fmul (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fmul();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
/* fdiv - fdiv. */
void OPPROTO op_fdiv (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fdiv();
#else
FT0 = float64_div(FT0, FT1, &env->fp_status);
/* fmadd - fmadd. */
void OPPROTO op_fmadd (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fmadd();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
/* fmsub - fmsub. */
void OPPROTO op_fmsub (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_fmsub();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
/* frsp - frsp. */
void OPPROTO op_frsp (void)
{
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
do_frsp();
#else
FT0 = float64_to_float32(FT0, &env->fp_status);
}
#endif
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_fadd (void)
{
if (unlikely(float64_is_signaling_nan(FT0) ||
FT0 = float64_div(FT0, FT1, &env->fp_status);
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fctiw (void)
{
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else {
p.ll = float64_to_int32(FT0, &env->fp_status);
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
/* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750
*/
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else {
p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status);
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
/* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750
*/
do_fri(float_round_down);
}
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_fmadd (void)
{
if (unlikely(float64_is_signaling_nan(FT0) ||
#endif
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fnmadd (void)
{
/* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
#ifdef FLOAT128
/* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128;
/* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
#ifdef FLOAT128
/* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128;
}
}
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_frsp (void)
{
if (unlikely(float64_is_signaling_nan(FT0))) {
FT0 = float64_to_float32(FT0, &env->fp_status);
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fsqrt (void)
{
/* Zero reciprocal */
float_zero_divide_excp();
} else if (likely(isnormal(FT0))) {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
FT0 = float64_div(1.0, FT0, &env->fp_status);
FT0 = float64_to_float32(FT0, &env->fp_status);
#else