prefetch((u8 *)src);
- DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+ DBG_nonverb(4, "%cX ep%d fifo %p count %d buf %p\n",
'T', hw_ep->epnum, fifo, len, src);
/* we can't assume unaligned reads work */
{
void __iomem *fifo = hw_ep->fifo;
- DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+ DBG_nonverb(4, "%cX ep%d fifo %p count %d buf %p\n",
'R', hw_ep->epnum, fifo, len, dst);
/* we can't assume unaligned writes work */
irqreturn_t handled = IRQ_NONE;
void __iomem *mbase = musb->mregs;
u8 r;
+ u8 testmode = musb_readb(musb->mregs, MUSB_TESTMODE);
- DBG(3, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl,
- int_usb);
+ DBG(3, "<== State=%s Testmode=%02x Power=%02x, DevCtl=%02x, int_usb=0x%x\n",
+ otg_state_string(musb), testmode, power, devctl, int_usb);
/* in host mode, the peripheral may issue remote wakeup.
* in peripheral mode, the host may resume the link.
#ifdef CONFIG_USB_MUSB_DEBUG
+#define xprintk_verb(level, facility, format, args...) do { \
+ if (_dbg_level(level)) { \
+ u8 testmode, devctl, power/*, otg_ctrl, func_ctrl, isp_debug*/; \
+ testmode = musb_readb(musb->mregs, MUSB_TESTMODE); \
+ devctl = musb_readb(musb->mregs, MUSB_DEVCTL); \
+ power = musb_readb(musb->mregs, MUSB_POWER); \
+ /*otg_ctrl = musb_ulpi_readb(musb->mregs, ISP1704_OTG_CTRL); \
+ func_ctrl = musb_ulpi_readb(musb->mregs, ISP1704_FUNC_CTRL); \
+ isp_debug = musb_ulpi_readb(musb->mregs, ISP1704_DEBUG); */ \
+ printk(facility "State=%s Testmode=%02x Power=%02x, DevCtl=%02x\n", \
+ otg_state_string(musb), testmode, power, devctl/*, otg_ctrl, func_ctrl, isp_debug*/); \
+ printk(facility "%-20s %4d: " format , \
+ __func__, __LINE__ , ## args); \
+ } } while (0)
+
#define xprintk(level, facility, format, args...) do { \
if (_dbg_level(level)) { \
printk(facility "%-20s %4d: " format , \
{
return musb_debug >= l;
}
-#define DBG(level, fmt, args...) xprintk(level, KERN_DEBUG, fmt, ## args)
+#define DBG(level, fmt, args...) xprintk_verb(level, KERN_DEBUG, fmt, ## args)
+#define DBG_nonverb(level, fmt, args...) xprintk(level, KERN_DEBUG, fmt, ## args)
#else
#define DBG(level, fmt, args...) do {} while(0)
#endif /* CONFIG_USB_MUSB_DEBUG */
if (!ep || !desc)
return -EINVAL;
+ musb_ep = to_musb_ep(ep);
+ musb = musb_ep->musb;
DBG(1, "===> enabling %s\n", ep->name);
- musb_ep = to_musb_ep(ep);
hw_ep = musb_ep->hw_ep;
regs = hw_ep->regs;
- musb = musb_ep->musb;
mbase = musb->mregs;
epnum = musb_ep->current_epnum;
int status = 0;
musb_ep = to_musb_ep(ep);
- DBG(4, "disabling %s\n", musb_ep->name);
musb = musb_ep->musb;
+ DBG(4, "disabling %s\n", musb_ep->name);
epnum = musb_ep->current_epnum;
epio = musb->endpoints[epnum].regs;
csr = musb_readw(epio, MUSB_TXCSR);
while (csr & MUSB_TXCSR_FIFONOTEMPTY) {
if (csr != lastcsr)
- DBG(3, "Host TX FIFONOTEMPTY csr: %02x\n", csr);
+ DBG_nonverb(3, "Host TX FIFONOTEMPTY csr: %02x\n", csr);
lastcsr = csr;
csr |= MUSB_TXCSR_FLUSHFIFO;
musb_writew(epio, MUSB_TXCSR, csr);
dma = is_in ? ep->rx_channel : ep->tx_channel;
if (dma) {
status = ep->musb->dma_controller->channel_abort(dma);
- DBG(status ? 1 : 3,
+ DBG_nonverb(status ? 1 : 3,
"abort %cX%d DMA for urb %p --> %d\n",
is_in ? 'R' : 'T', ep->epnum,
urb, status);
while (!(musb_readb(addr, ULPI_REG_CONTROL) & ULPI_REG_CMPLT)) {
i++;
if (i == 10000) {
- DBG(3, "ULPI read timed out\n");
+ DBG_nonverb(3, "ULPI read timed out\n");
return 0;
}
while(!(musb_readb(addr, ULPI_REG_CONTROL) & ULPI_REG_CMPLT)) {
i++;
if (i == 10000) {
- DBG(3, "ULPI write timed out\n");
+ DBG_nonverb(3, "ULPI write timed out\n");
return;
}
}
u8 bchannel = musb_channel->idx;
u16 csr = 0;
- DBG(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n",
+ DBG_nonverb(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n",
channel, packet_sz, dma_addr, len, mode);
if (mode)
{
struct musb_dma_channel *musb_channel = channel->private_data;
- DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n",
+ DBG_nonverb(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n",
musb_channel->epnum,
musb_channel->transmit ? "Tx" : "Rx",
packet_sz, dma_addr, len, mode);
spin_lock_irqsave(&musb->lock, flags);
+ DBG(3, "%s\n", otg_state_string(musb));
+
devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
switch (musb->xceiv->state) {