/*****************************************************************************/
/* Code translation helpers */
-static TCGv cpu_env, cpu_T[3];
+/* global register indexes */
+static TCGv cpu_env;
+static char cpu_reg_names[10*3 + 22*4
+#if !defined(TARGET_PPC64)
+ + 10*4 + 22*5
+#endif
+];
+static TCGv cpu_gpr[32];
+#if !defined(TARGET_PPC64)
+static TCGv cpu_gprh[32];
+#endif
+
+/* dyngen register indexes */
+static TCGv cpu_T[3];
+#if defined(TARGET_PPC64)
+#define cpu_T64 cpu_T
+#else
+static TCGv cpu_T64[3];
+#endif
#include "gen-icount.h"
void ppc_translate_init(void)
{
+ int i;
+ char* p;
static int done_init = 0;
+
if (done_init)
return;
+
cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
#if TARGET_LONG_BITS > HOST_LONG_BITS
cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
#endif
+#if !defined(TARGET_PPC64)
+ cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64,
+ TCG_AREG0, offsetof(CPUState, t0),
+ "T0_64");
+ cpu_T64[1] = tcg_global_mem_new(TCG_TYPE_I64,
+ TCG_AREG0, offsetof(CPUState, t1),
+ "T1_64");
+ cpu_T64[2] = tcg_global_mem_new(TCG_TYPE_I64,
+ TCG_AREG0, offsetof(CPUState, t2),
+ "T2_64");
+#endif
+
+ p = cpu_reg_names;
+ for (i = 0; i < 32; i++) {
+ sprintf(p, "r%d", i);
+ cpu_gpr[i] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
+ offsetof(CPUState, gpr[i]), p);
+ p += (i < 10) ? 3 : 4;
+#if !defined(TARGET_PPC64)
+ sprintf(p, "r%dH", i);
+ cpu_gprh[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
+ offsetof(CPUState, gprh[i]), p);
+ p += (i < 10) ? 4 : 5;
+#endif
+ }
/* register helpers */
#undef DEF_HELPER
GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf);
#endif
-/* General purpose registers moves */
-GEN32(gen_op_load_gpr_T0, gen_op_load_gpr_T0_gpr);
-GEN32(gen_op_load_gpr_T1, gen_op_load_gpr_T1_gpr);
-GEN32(gen_op_load_gpr_T2, gen_op_load_gpr_T2_gpr);
-
-GEN32(gen_op_store_T0_gpr, gen_op_store_T0_gpr_gpr);
-GEN32(gen_op_store_T1_gpr, gen_op_store_T1_gpr_gpr);
-#if 0 // unused
-GEN32(gen_op_store_T2_gpr, gen_op_store_T2_gpr_gpr);
-#endif
-
/* floating point registers moves */
GEN32(gen_op_load_fpr_FT0, gen_op_load_fpr_FT0_fpr);
GEN32(gen_op_load_fpr_FT1, gen_op_load_fpr_FT1_fpr);
#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval, type) \
GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval, type) \
GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3, type) \
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, inval, type) \
GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
if (ctx->sf_mode) \
gen_op_##name##_64(); \
else \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH2_O_64(name, opc1, opc2, opc3, inval, type) \
GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
if (ctx->sf_mode) \
gen_op_##name##_64(); \
else \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
if (ctx->sf_mode) \
gen_op_##name##_64(); \
else \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define __GEN_INT_ARITH1_O_64(name, opc1, opc2, opc3, type) \
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
if (ctx->sf_mode) \
gen_op_##name##_64(); \
else \
gen_op_##name(); \
- gen_op_store_T0_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
/* li case */
tcg_gen_movi_tl(cpu_T[0], simm);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0))
gen_op_addi(simm);
}
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* addic */
GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
target_long simm = SIMM(ctx->opcode);
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0)) {
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]);
gen_op_addi(simm);
} else {
gen_op_clear_xer_ca();
}
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* addic. */
GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
target_long simm = SIMM(ctx->opcode);
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0)) {
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]);
gen_op_addi(simm);
} else {
gen_op_clear_xer_ca();
}
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
gen_set_Rc0(ctx);
}
/* addis */
/* lis case */
tcg_gen_movi_tl(cpu_T[0], simm << 16);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0))
gen_op_addi(simm << 16);
}
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* mulli */
GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_mulli(SIMM(ctx->opcode));
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* subfic */
GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_subfic_64(SIMM(ctx->opcode));
else
#endif
gen_op_subfic(SIMM(ctx->opcode));
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
#if defined(TARGET_PPC64)
#define GEN_CMP(name, opc, type) \
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
if (ctx->sf_mode && (ctx->opcode & 0x00200000)) \
gen_op_##name##_64(); \
else \
#define GEN_CMP(name, opc, type) \
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \
{ \
- gen_op_load_gpr_T0(rA(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
gen_op_##name(); \
gen_op_store_T0_crf(crfD(ctx->opcode)); \
}
/* cmpi */
GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
#if defined(TARGET_PPC64)
if (ctx->sf_mode && (ctx->opcode & 0x00200000))
gen_op_cmpi_64(SIMM(ctx->opcode));
/* cmpli */
GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
#if defined(TARGET_PPC64)
if (ctx->sf_mode && (ctx->opcode & 0x00200000))
gen_op_cmpli_64(UIMM(ctx->opcode));
if (rA(ctx->opcode) == 0) {
tcg_gen_movi_tl(cpu_T[0], 0);
} else {
- gen_op_load_gpr_T1(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
}
- gen_op_load_gpr_T2(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rB(ctx->opcode)]);
mask = 1 << (3 - (bi & 0x03));
gen_op_load_crf_T0(bi >> 2);
gen_op_test_true(mask);
gen_op_isel();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/*** Integer logical ***/
#define __GEN_LOGICAL2(name, opc2, opc3, type) \
GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, type) \
{ \
- gen_op_load_gpr_T0(rS(ctx->opcode)); \
- gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
#define GEN_LOGICAL1(name, opc, type) \
GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type) \
{ \
- gen_op_load_gpr_T0(rS(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]); \
gen_op_##name(); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
if (unlikely(Rc(ctx->opcode) != 0)) \
gen_set_Rc0(ctx); \
}
/* andi. */
GEN_HANDLER2(andi_, "andi.", 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
gen_op_andi_T0(UIMM(ctx->opcode));
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
gen_set_Rc0(ctx);
}
/* andis. */
GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
gen_op_andi_T0(UIMM(ctx->opcode) << 16);
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
gen_set_Rc0(ctx);
}
rb = rB(ctx->opcode);
/* Optimisation for mr. ri case */
if (rs != ra || rs != rb) {
- gen_op_load_gpr_T0(rs);
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rs]);
if (rs != rb) {
- gen_op_load_gpr_T1(rb);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rb]);
gen_op_or();
}
- gen_op_store_T0_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
} else if (unlikely(Rc(ctx->opcode) != 0)) {
- gen_op_load_gpr_T0(rs);
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rs]);
gen_set_Rc0(ctx);
#if defined(TARGET_PPC64)
} else {
/* xor & xor. */
GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
/* Optimisation for "set to zero" case */
if (rS(ctx->opcode) != rB(ctx->opcode)) {
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_xor();
} else {
tcg_gen_movi_tl(cpu_T[0], 0);
}
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* XXX: should handle special NOPs for POWER series */
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(uimm != 0))
gen_op_ori(uimm);
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
/* oris */
GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
/* NOP */
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(uimm != 0))
gen_op_ori(uimm << 16);
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
/* xori */
GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
/* NOP */
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(uimm != 0))
gen_op_xori(uimm);
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
/* xoris */
/* NOP */
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(uimm != 0))
gen_op_xori(uimm << 16);
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
/* popcntb : PowerPC 2.03 specification */
GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_popcntb_64();
else
#endif
gen_op_popcntb();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
#if defined(TARGET_PPC64)
sh = SH(ctx->opcode);
if (likely(sh == 0)) {
if (likely(mb == 0 && me == 31)) {
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
goto do_store;
} else if (likely(mb == 31 && me == 0)) {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
goto do_store;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
goto do_mask;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
gen_op_rotli32_T0(SH(ctx->opcode));
do_mask:
#if defined(TARGET_PPC64)
gen_op_andi_T1(~mask);
gen_op_or();
do_store:
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
sh = SH(ctx->opcode);
mb = MB(ctx->opcode);
me = ME(ctx->opcode);
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(sh == 0)) {
goto do_mask;
}
#endif
gen_op_andi_T0(MASK(mb, me));
do_store:
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
mb = MB(ctx->opcode);
me = ME(ctx->opcode);
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_rotl32_T0_T1();
if (unlikely(mb != 0 || me != 31)) {
#if defined(TARGET_PPC64)
#endif
gen_op_andi_T0(MASK(mb, me));
}
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
static always_inline void gen_rldinm (DisasContext *ctx, uint32_t mb,
uint32_t me, uint32_t sh)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (likely(sh == 0)) {
goto do_mask;
}
do_mask:
gen_andi_T0_64(ctx, MASK(mb, me));
do_store:
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb,
uint32_t me)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_rotl64_T0_T1();
if (unlikely(mb != 0 || me != 63)) {
gen_andi_T0_64(ctx, MASK(mb, me));
}
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
me = 63 - sh;
if (likely(sh == 0)) {
if (likely(mb == 0)) {
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
goto do_store;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
goto do_mask;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
gen_op_rotli64_T0(sh);
do_mask:
mask = MASK(mb, me);
gen_andi_T1_64(ctx, ~mask);
gen_op_or();
do_store:
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER)
{
int mb, me;
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (SH(ctx->opcode) != 0) {
tcg_gen_mov_tl(cpu_T[1], cpu_T[0]);
mb = 32 - SH(ctx->opcode);
#endif
gen_op_srawi(SH(ctx->opcode), MASK(mb, me));
}
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
uint64_t mask;
int sh, mb, me;
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
sh = SH(ctx->opcode) + (n << 5);
if (sh != 0) {
tcg_gen_mov_tl(cpu_T[1], cpu_T[0]);
mask = MASK(mb, me);
gen_op_sradi(sh, mask >> 32, mask);
}
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
if (rA(ctx->opcode) == 0) {
tcg_gen_movi_tl(cpu_T[0], simm);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0))
gen_op_addi(simm);
}
static always_inline void gen_addr_reg_index (DisasContext *ctx)
{
if (rA(ctx->opcode) == 0) {
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_add();
}
#ifdef DEBUG_MEMORY_ACCESSES
if (rA(ctx->opcode) == 0) {
tcg_gen_movi_tl(cpu_T[0], 0);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
}
#ifdef DEBUG_MEMORY_ACCESSES
gen_op_print_mem_EA();
{ \
gen_addr_imm_index(ctx, 0); \
op_ldst(l##width); \
- gen_op_store_T1_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]); \
}
#define GEN_LDU(width, opc, type) \
else \
gen_addr_imm_index(ctx, 0); \
op_ldst(l##width); \
- gen_op_store_T1_gpr(rD(ctx->opcode)); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_LDUX(width, opc2, opc3, type) \
} \
gen_addr_reg_index(ctx); \
op_ldst(l##width); \
- gen_op_store_T1_gpr(rD(ctx->opcode)); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_LDX(width, opc2, opc3, type) \
{ \
gen_addr_reg_index(ctx); \
op_ldst(l##width); \
- gen_op_store_T1_gpr(rD(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]); \
}
#define GEN_LDS(width, op, type) \
/* ld - ldu */
op_ldst(ld);
}
- gen_op_store_T1_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]);
if (Rc(ctx->opcode))
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
/* lq */
GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX)
}
gen_addr_imm_index(ctx, 0x0F);
op_ldst(ld);
- gen_op_store_T1_gpr(rd);
+ tcg_gen_mov_tl(cpu_gpr[rd], cpu_T[1]);
gen_op_addi(8);
op_ldst(ld);
- gen_op_store_T1_gpr(rd + 1);
+ tcg_gen_mov_tl(cpu_gpr[rd + 1], cpu_T[1]);
#endif
}
#endif
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type) \
{ \
gen_addr_imm_index(ctx, 0); \
- gen_op_load_gpr_T1(rS(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]); \
op_ldst(st##width); \
}
gen_addr_imm_index(ctx, 0x03); \
else \
gen_addr_imm_index(ctx, 0); \
- gen_op_load_gpr_T1(rS(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]); \
op_ldst(st##width); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_STUX(width, opc2, opc3, type) \
return; \
} \
gen_addr_reg_index(ctx); \
- gen_op_load_gpr_T1(rS(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]); \
op_ldst(st##width); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_STX(width, opc2, opc3, type) \
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type) \
{ \
gen_addr_reg_index(ctx); \
- gen_op_load_gpr_T1(rS(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]); \
op_ldst(st##width); \
}
return;
}
gen_addr_imm_index(ctx, 0x03);
- gen_op_load_gpr_T1(rs);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs]);
op_ldst(std);
gen_op_addi(8);
- gen_op_load_gpr_T1(rs + 1);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs + 1]);
op_ldst(std);
#endif
} else {
}
}
gen_addr_imm_index(ctx, 0x03);
- gen_op_load_gpr_T1(rs);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs]);
op_ldst(std);
if (Rc(ctx->opcode))
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
}
}
#endif
gen_update_nip(ctx, ctx->nip - 4);
gen_addr_reg_index(ctx);
op_lwarx();
- gen_op_store_T1_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]);
}
/* stwcx. */
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_addr_reg_index(ctx);
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
op_stwcx();
}
gen_update_nip(ctx, ctx->nip - 4);
gen_addr_reg_index(ctx);
op_ldarx();
- gen_op_store_T1_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[1]);
}
/* stdcx. */
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_addr_reg_index(ctx);
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
op_stdcx();
}
#endif /* defined(TARGET_PPC64) */
gen_addr_imm_index(ctx, 0); \
op_ldst(l##width); \
gen_op_store_FT0_fpr(rD(ctx->opcode)); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_LDUXF(width, opc, type) \
gen_addr_reg_index(ctx); \
op_ldst(l##width); \
gen_op_store_FT0_fpr(rD(ctx->opcode)); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_LDXF(width, opc2, opc3, type) \
gen_addr_imm_index(ctx, 0); \
gen_op_load_fpr_FT0(rS(ctx->opcode)); \
op_ldst(st##width); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_STUXF(width, opc, type) \
gen_addr_reg_index(ctx); \
gen_op_load_fpr_FT0(rS(ctx->opcode)); \
op_ldst(st##width); \
- gen_op_store_T0_gpr(rA(ctx->opcode)); \
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); \
}
#define GEN_STXF(width, opc2, opc3, type) \
/* tw */
GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
gen_op_tw(TO(ctx->opcode));
/* twi */
GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
/* td */
GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
gen_op_td(TO(ctx->opcode));
/* tdi */
GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
/* Update the nip since this might generate a trap exception */
gen_update_nip(ctx, ctx->nip);
} else {
gen_op_load_cr();
}
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* mfmsr */
return;
}
gen_op_load_msr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
if (likely(read_cb != NULL)) {
if (likely(read_cb != SPR_NOACCESS)) {
(*read_cb)(ctx, sprn);
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
} else {
/* Privilege exception */
/* This is a hack to avoid warnings when running Linux:
{
uint32_t crm, crn;
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
crm = CRM(ctx->opcode);
if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
crn = ffs(crm);
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (ctx->opcode & 0x00010000) {
/* Special form that does not need any synchronisation */
gen_op_update_riee();
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
if (ctx->opcode & 0x00010000) {
/* Special form that does not need any synchronisation */
gen_op_update_riee();
write_cb = ctx->spr_cb[sprn].uea_write;
if (likely(write_cb != NULL)) {
if (likely(write_cb != SPR_NOACCESS)) {
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
(*write_cb)(ctx, sprn);
} else {
/* Privilege exception */
}
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
gen_op_load_sr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_srli_T1(28);
gen_op_load_sr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
gen_op_store_sr();
#endif
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_srli_T1(28);
gen_op_store_sr();
#endif
}
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
gen_op_load_slb();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_srli_T1(28);
gen_op_load_slb();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
gen_op_store_slb();
#endif
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_srli_T1(28);
gen_op_store_slb();
#endif
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_tlbie_64();
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
gen_op_slbie();
#endif
}
/* Should check EAR[E] & alignment ! */
gen_addr_reg_index(ctx);
op_eciwx();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* ecowx */
{
/* Should check EAR[E] & alignment ! */
gen_addr_reg_index(ctx);
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
op_ecowx();
}
/* abs - abs. */
GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_POWER_abs();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* abso - abso. */
GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_POWER_abso();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* clcs */
GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_POWER_clcs();
/* Rc=1 sets CR0 to an undefined state */
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* div - div. */
GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_div();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* divo - divo. */
GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_divo();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* divs - divs. */
GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_divs();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* divso - divso. */
GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_divso();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* doz - doz. */
GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_doz();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* dozo - dozo. */
GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_dozo();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* dozi */
GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
gen_op_POWER_doz();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
/* As lscbx load from memory byte after byte, it's always endian safe.
/* maskg - maskg. */
GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_maskg();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* maskir - maskir. */
GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
- gen_op_load_gpr_T2(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_maskir();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* mul - mul. */
GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_mul();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* mulo - mulo. */
GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_mulo();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* nabs - nabs. */
GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_POWER_nabs();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* nabso - nabso. */
GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_POWER_nabso();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
mb = MB(ctx->opcode);
me = ME(ctx->opcode);
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
- gen_op_load_gpr_T2(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_rlmi(MASK(mb, me), ~MASK(mb, me));
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* rrib - rrib. */
GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rA(ctx->opcode));
- gen_op_load_gpr_T2(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_rrib();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sle - sle. */
GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sle();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sleq - sleq. */
GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sleq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sliq - sliq. */
GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
gen_op_POWER_sle();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* slliq - slliq. */
GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
gen_op_POWER_sleq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sllq - sllq. */
GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sllq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* slq - slq. */
GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_slq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sraiq - sraiq. */
GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
gen_op_POWER_sraq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sraq - sraq. */
GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sraq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sre - sre. */
GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sre();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* srea - srea. */
GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_srea();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sreq */
GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_sreq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* sriq */
GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
gen_op_POWER_srq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* srliq */
GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
gen_op_POWER_srlq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* srlq */
GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_srlq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
/* srq */
GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_POWER_srq();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx);
}
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_602_mfrom();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
gen_op_6xx_tlbld();
#endif
}
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
gen_op_6xx_tlbli();
#endif
}
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
gen_op_74xx_tlbld();
#endif
}
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]);
gen_op_74xx_tlbli();
#endif
}
gen_addr_reg_index(ctx);
gen_op_POWER_mfsri();
- gen_op_store_T0_gpr(rd);
+ tcg_gen_mov_tl(cpu_gpr[rd], cpu_T[0]);
if (ra != 0 && ra != rd)
- gen_op_store_T1_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[1]);
#endif
}
}
gen_addr_reg_index(ctx);
gen_op_POWER_rac();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
gen_op_store_FT0_fpr(rD(ctx->opcode));
gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
if (ra != 0)
- gen_op_store_T0_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[0]);
}
/* lfqux */
gen_op_store_FT0_fpr(rD(ctx->opcode));
gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
if (ra != 0)
- gen_op_store_T0_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[0]);
}
/* lfqx */
gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
op_POWER2_stfq();
if (ra != 0)
- gen_op_store_T0_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[0]);
}
/* stfqux */
gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
op_POWER2_stfq();
if (ra != 0)
- gen_op_store_T0_gpr(ra);
+ tcg_gen_mov_tl(cpu_gpr[ra], cpu_T[0]);
}
/* stfqx */
int opc2, int opc3,
int ra, int rb, int rt, int Rc)
{
- gen_op_load_gpr_T0(ra);
- gen_op_load_gpr_T1(rb);
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[ra]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rb]);
switch (opc3 & 0x0D) {
case 0x05:
/* macchw - macchw. - macchwo - macchwo. */
}
if (opc2 & 0x04) {
/* (n)multiply-and-accumulate (0x0C - 0x0E) */
- gen_op_load_gpr_T2(rt);
+ tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rt]);
tcg_gen_mov_tl(cpu_T[1], cpu_T[0]);
gen_op_405_add_T0_T2();
}
else
gen_op_405_check_satu();
}
- gen_op_store_T0_gpr(rt);
+ tcg_gen_mov_tl(cpu_gpr[rt], cpu_T[0]);
if (unlikely(Rc) != 0) {
/* Update Rc0 */
gen_set_Rc0(ctx);
}
tcg_gen_movi_tl(cpu_T[0], dcrn);
gen_op_load_dcr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
return;
}
tcg_gen_movi_tl(cpu_T[0], dcrn);
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_store_dcr();
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_load_dcr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
#endif
}
GEN_EXCP_PRIVREG(ctx);
return;
}
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_store_dcr();
/* Note: Rc update flag set leads to undefined state of Rc0 */
#endif
/* mfdcrux (PPC 460) : user-mode access to DCR */
GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_load_dcr();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
}
/* mtdcrux (PPC 460) : user-mode access to DCR */
GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX)
{
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_store_dcr();
/* Note: Rc update flag set leads to undefined state of Rc0 */
}
}
gen_addr_reg_index(ctx);
op_ldst(lwz);
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
}
switch (rB(ctx->opcode)) {
case 0:
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_4xx_tlbre_hi();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
break;
case 1:
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_4xx_tlbre_lo();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
break;
default:
GEN_EXCP_INVAL(ctx);
gen_op_4xx_tlbsx();
if (Rc(ctx->opcode))
gen_op_4xx_tlbsx_check();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
}
switch (rB(ctx->opcode)) {
case 0:
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_4xx_tlbwe_hi();
break;
case 1:
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_4xx_tlbwe_lo();
break;
default:
case 0:
case 1:
case 2:
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
gen_op_440_tlbre(rB(ctx->opcode));
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
break;
default:
GEN_EXCP_INVAL(ctx);
gen_op_440_tlbsx();
if (Rc(ctx->opcode))
gen_op_4xx_tlbsx_check();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
#endif
}
case 0:
case 1:
case 2:
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rS(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
gen_op_440_tlbwe(rB(ctx->opcode));
break;
default:
GEN_EXCP_PRIVOPC(ctx);
return;
}
- gen_op_load_gpr_T0(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rD(ctx->opcode)]);
gen_op_wrte();
/* Stop translation to have a chance to raise an exception
* if we just set msr_ee to 1
/* dlmzb */
GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC)
{
- gen_op_load_gpr_T0(rS(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_440_dlmzb();
- gen_op_store_T0_gpr(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
gen_op_store_xer_bc();
if (Rc(ctx->opcode)) {
gen_op_440_dlmzb_update_Rc();
/*** SPE extension ***/
/* Register moves */
-#if !defined(TARGET_PPC64)
-
-GEN32(gen_op_load_gpr64_T0, gen_op_load_gpr64_T0_gpr);
-GEN32(gen_op_load_gpr64_T1, gen_op_load_gpr64_T1_gpr);
-#if 0 // unused
-GEN32(gen_op_load_gpr64_T2, gen_op_load_gpr64_T2_gpr);
-#endif
-
-GEN32(gen_op_store_T0_gpr64, gen_op_store_T0_gpr64_gpr);
-GEN32(gen_op_store_T1_gpr64, gen_op_store_T1_gpr64_gpr);
-#if 0 // unused
-GEN32(gen_op_store_T2_gpr64, gen_op_store_T2_gpr64_gpr);
-#endif
-
-#else /* !defined(TARGET_PPC64) */
-/* No specific load/store functions: GPRs are already 64 bits */
-#define gen_op_load_gpr64_T0 gen_op_load_gpr_T0
-#define gen_op_load_gpr64_T1 gen_op_load_gpr_T1
-#if 0 // unused
-#define gen_op_load_gpr64_T2 gen_op_load_gpr_T2
+static always_inline void gen_load_gpr64(TCGv t, int reg) {
+#if defined(TARGET_PPC64)
+ tcg_gen_mov_i64(t, cpu_gpr[reg]);
+#else
+ tcg_gen_extu_i32_i64(t, cpu_gprh[reg]);
+ tcg_gen_shli_i64(t, t, 32);
+ TCGv tmp = tcg_temp_local_new(TCG_TYPE_I64);
+ tcg_gen_extu_i32_i64(tmp, cpu_gpr[reg]);
+ tcg_gen_or_i64(t, t, tmp);
+ tcg_temp_free(tmp);
#endif
+}
-#define gen_op_store_T0_gpr64 gen_op_store_T0_gpr
-#define gen_op_store_T1_gpr64 gen_op_store_T1_gpr
-#if 0 // unused
-#define gen_op_store_T2_gpr64 gen_op_store_T2_gpr
+static always_inline void gen_store_gpr64(int reg, TCGv t) {
+#if defined(TARGET_PPC64)
+ tcg_gen_mov_i64(cpu_gpr[reg], t);
+#else
+ tcg_gen_trunc_i64_i32(cpu_gpr[reg], t);
+ TCGv tmp = tcg_temp_local_new(TCG_TYPE_I64);
+ tcg_gen_shri_i64(tmp, t, 32);
+ tcg_gen_trunc_i64_i32(cpu_gprh[reg], tmp);
+ tcg_temp_free(tmp);
#endif
-
-#endif /* !defined(TARGET_PPC64) */
+}
#define GEN_SPE(name0, name1, opc2, opc3, inval, type) \
GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type) \
if (rA(ctx->opcode) == 0) {
tcg_gen_movi_tl(cpu_T[0], simm << sh);
} else {
- gen_op_load_gpr_T0(rA(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
if (likely(simm != 0))
gen_op_addi(simm << sh);
}
} \
gen_addr_spe_imm_index(ctx, sh); \
op_spe_ldst(spe_l##name); \
- gen_op_store_T1_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[1]); \
}
#define GEN_SPE_LDX(name) \
} \
gen_addr_reg_index(ctx); \
op_spe_ldst(spe_l##name); \
- gen_op_store_T1_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[1]); \
}
#define GEN_SPEOP_LD(name, sh) \
return; \
} \
gen_addr_spe_imm_index(ctx, sh); \
- gen_op_load_gpr64_T1(rS(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[1], rS(ctx->opcode)); \
op_spe_ldst(spe_st##name); \
}
return; \
} \
gen_addr_reg_index(ctx); \
- gen_op_load_gpr64_T1(rS(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[1], rS(ctx->opcode)); \
op_spe_ldst(spe_st##name); \
}
GEN_EXCP_NO_AP(ctx); \
return; \
} \
- gen_op_load_gpr64_T0(rA(ctx->opcode)); \
- gen_op_load_gpr64_T1(rB(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rA(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[1], rB(ctx->opcode)); \
gen_op_##name(); \
- gen_op_store_T0_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]); \
}
#define GEN_SPEOP_ARITH1(name) \
GEN_EXCP_NO_AP(ctx); \
return; \
} \
- gen_op_load_gpr64_T0(rA(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rA(ctx->opcode)); \
gen_op_##name(); \
- gen_op_store_T0_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]); \
}
#define GEN_SPEOP_COMP(name) \
GEN_EXCP_NO_AP(ctx); \
return; \
} \
- gen_op_load_gpr64_T0(rA(ctx->opcode)); \
- gen_op_load_gpr64_T1(rB(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rA(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[1], rB(ctx->opcode)); \
gen_op_##name(); \
gen_op_store_T0_crf(crfD(ctx->opcode)); \
}
static always_inline void gen_brinc (DisasContext *ctx)
{
/* Note: brinc is usable even if SPE is disabled */
- gen_op_load_gpr_T0(rA(ctx->opcode));
- gen_op_load_gpr_T1(rB(ctx->opcode));
+ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
gen_op_brinc();
- gen_op_store_T0_gpr(rD(ctx->opcode));
+ tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
}
#define GEN_SPEOP_ARITH_IMM2(name) \
GEN_EXCP_NO_AP(ctx); \
return; \
} \
- gen_op_load_gpr64_T0(rB(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rB(ctx->opcode)); \
gen_op_splatwi_T1_64(rA(ctx->opcode)); \
gen_op_##name(); \
- gen_op_store_T0_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]); \
}
#define GEN_SPEOP_LOGIC_IMM2(name) \
GEN_EXCP_NO_AP(ctx); \
return; \
} \
- gen_op_load_gpr64_T0(rA(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rA(ctx->opcode)); \
gen_op_splatwi_T1_64(rB(ctx->opcode)); \
gen_op_##name(); \
- gen_op_store_T0_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]); \
}
GEN_SPEOP_ARITH_IMM2(evaddw);
int32_t imm = (int32_t)(rA(ctx->opcode) << 27) >> 27;
gen_op_splatwi_T0_64(imm);
- gen_op_store_T0_gpr64(rD(ctx->opcode));
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]);
}
static always_inline void gen_evsplatfi (DisasContext *ctx)
uint32_t imm = rA(ctx->opcode) << 27;
gen_op_splatwi_T0_64(imm);
- gen_op_store_T0_gpr64(rD(ctx->opcode));
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]);
}
/* Comparison */
return;
}
gen_op_load_crf_T0(ctx->opcode & 0x7);
- gen_op_load_gpr64_T0(rA(ctx->opcode));
- gen_op_load_gpr64_T1(rB(ctx->opcode));
+ gen_load_gpr64(cpu_T64[0], rA(ctx->opcode));
+ gen_load_gpr64(cpu_T64[1], rB(ctx->opcode));
gen_op_evsel();
- gen_op_store_T0_gpr64(rD(ctx->opcode));
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]);
}
GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE)
#define GEN_SPEFPUOP_CONV(name) \
static always_inline void gen_##name (DisasContext *ctx) \
{ \
- gen_op_load_gpr64_T0(rB(ctx->opcode)); \
+ gen_load_gpr64(cpu_T64[0], rB(ctx->opcode)); \
gen_op_##name(); \
- gen_op_store_T0_gpr64(rD(ctx->opcode)); \
+ gen_store_gpr64(rD(ctx->opcode), cpu_T64[0]); \
}
/* Single precision floating-point vectors operations */