From 6ef99fc59c74a3fde6daaa005ff8a6159b720105 Mon Sep 17 00:00:00 2001 From: ths Date: Sun, 13 May 2007 16:36:24 +0000 Subject: [PATCH] Add fpu register support to the gdb code, by Magnus Damm. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2817 c046a42c-6fe2-441c-8c8c-71466251a162 --- gdbstub.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index 62c1db2..7dcaade 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -657,6 +657,9 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) } } #elif defined (TARGET_SH4) + +/* Hint: Use "set architecture sh4" in GDB to see fpu registers */ + static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) { uint32_t *ptr = (uint32_t *)mem_buf; @@ -676,12 +679,14 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) SAVE (env->mach); SAVE (env->macl); SAVE (env->sr); - SAVE (0); /* TICKS */ - SAVE (0); /* STALLS */ - SAVE (0); /* CYCLES */ - SAVE (0); /* INSTS */ - SAVE (0); /* PLR */ - + SAVE (env->fpul); + SAVE (env->fpscr); + for (i = 0; i < 16; i++) + SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); + SAVE (env->ssr); + SAVE (env->spc); + for (i = 0; i < 8; i++) SAVE(env->gregs[i]); + for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); return ((uint8_t *)ptr - mem_buf); } @@ -704,6 +709,14 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) LOAD (env->mach); LOAD (env->macl); LOAD (env->sr); + LOAD (env->fpul); + LOAD (env->fpscr); + for (i = 0; i < 16; i++) + LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); + LOAD (env->ssr); + LOAD (env->spc); + for (i = 0; i < 8; i++) LOAD(env->gregs[i]); + for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); } #else static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) -- 1.7.9.5