From d4a9eb1fc6fff9346963ef67629d1b232f01789c Mon Sep 17 00:00:00 2001 From: blueswir1 Date: Sun, 5 Oct 2008 09:59:14 +0000 Subject: [PATCH] Add some missing static and const qualifiers, reg_names only used if NDEBUG set git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162 --- tcg/arm/tcg-target.c | 13 ++++++++----- tcg/hppa/tcg-target.c | 4 +++- tcg/i386/tcg-target.c | 13 ++++++++----- tcg/ppc/tcg-target.c | 2 ++ tcg/ppc64/tcg-target.c | 2 ++ tcg/sparc/tcg-target.c | 2 ++ tcg/x86_64/tcg-target.c | 11 +++++++---- 7 files changed, 32 insertions(+), 15 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index dee1ebc..d2a317d 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { + +#ifndef NDEBUG +static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r0", "%r1", "%r2", @@ -38,8 +40,9 @@ const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r13", "%r14", }; +#endif -int tcg_target_reg_alloc_order[] = { +static const int tcg_target_reg_alloc_order[] = { TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, @@ -57,10 +60,10 @@ int tcg_target_reg_alloc_order[] = { TCG_REG_R14, }; -const int tcg_target_call_iarg_regs[4] = { +static const int tcg_target_call_iarg_regs[4] = { TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3 }; -const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[2] = { TCG_REG_R0, TCG_REG_R1 }; @@ -91,7 +94,7 @@ static inline int tcg_target_get_call_iarg_regs_count(int flags) } /* parse target specific constraints */ -int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) +static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) { const char *ct_str; diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c index 3affd26..5960c03 100644 --- a/tcg/hppa/tcg-target.c +++ b/tcg/hppa/tcg-target.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r0", "%r1", @@ -56,6 +57,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%sp", "%r31", }; +#endif static const int tcg_target_reg_alloc_order[] = { TCG_REG_R4, @@ -106,7 +108,7 @@ static inline int tcg_target_get_call_iarg_regs_count(int flags) } /* parse target specific constraints */ -int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) +static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) { const char *ct_str; diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 08bb783..fa0a2ca 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { + +#ifndef NDEBUG +static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%eax", "%ecx", "%edx", @@ -31,8 +33,9 @@ const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%esi", "%edi", }; +#endif -int tcg_target_reg_alloc_order[] = { +static const int tcg_target_reg_alloc_order[] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX, @@ -42,8 +45,8 @@ int tcg_target_reg_alloc_order[] = { TCG_REG_EBP, }; -const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX }; -const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX }; +static const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX }; +static const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX }; static uint8_t *tb_ret_addr; @@ -80,7 +83,7 @@ static inline int tcg_target_get_call_iarg_regs_count(int flags) } /* parse target specific constraints */ -int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) +static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) { const char *ct_str; diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index c5b4c18..ca8ca36 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -39,6 +39,7 @@ static uint8_t *tb_ret_addr; #define ADDEND_OFFSET 4 #endif +#ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "r0", "r1", @@ -73,6 +74,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "r30", "r31" }; +#endif static const int tcg_target_reg_alloc_order[] = { TCG_REG_R14, diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index ff10c37..4943514 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -42,6 +42,7 @@ static uint8_t *tb_ret_addr; #define CMP_L (1<<21) #endif +#ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "r0", "r1", @@ -76,6 +77,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "r30", "r31" }; +#endif static const int tcg_target_reg_alloc_order[] = { TCG_REG_R14, diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index f36796d..2c571a7 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%g0", "%g1", @@ -56,6 +57,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%i6", "%i7", }; +#endif static const int tcg_target_reg_alloc_order[] = { TCG_REG_L0, diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c index 304a0c3..551ca78 100644 --- a/tcg/x86_64/tcg-target.c +++ b/tcg/x86_64/tcg-target.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { + +#ifndef NDEBUG +static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%rax", "%rcx", "%rdx", @@ -39,8 +41,9 @@ const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r14", "%r15", }; +#endif -int tcg_target_reg_alloc_order[] = { +static const int tcg_target_reg_alloc_order[] = { TCG_REG_RDI, TCG_REG_RSI, TCG_REG_RDX, @@ -59,7 +62,7 @@ int tcg_target_reg_alloc_order[] = { TCG_REG_R15, }; -const int tcg_target_call_iarg_regs[6] = { +static const int tcg_target_call_iarg_regs[6] = { TCG_REG_RDI, TCG_REG_RSI, TCG_REG_RDX, @@ -68,7 +71,7 @@ const int tcg_target_call_iarg_regs[6] = { TCG_REG_R9, }; -const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[2] = { TCG_REG_RAX, TCG_REG_RDX }; -- 1.7.9.5