workaround a problem with the harmattan gcc

[drnoksnes] / 65c816ops.inc

diff --git a/65c816ops.inc b/65c816ops.inc
index d28cb1f..a36bbfa 100644 (file)
--- a/65c816ops.inc
+++ b/65c816ops.inc
@@ -2447,47 +2447,48 @@ static void Op0CM0 ()
 /* Branch Instructions *********************************************************************** */
 #ifndef SA1_OPCODES
 #define BranchCheck0()\
-    if( CPU.BranchSkip)\
+    if (CPU.BranchSkip)\
     {\
-       CPU.BranchSkip = FALSE;\
-       if (!Settings.SoundSkipMethod)\
-           if( CPU.PC - CPU.PCBase > OpAddress)\
-               return;\
+               CPU.BranchSkip = FALSE;\
+               if (!Settings.SoundSkipMethod)\
+                       if( CPU.PC - CPU.PCBase > OpAddress)\
+                           return;\
     }
 
 #define BranchCheck1()\
-    if( CPU.BranchSkip)\
+    if (CPU.BranchSkip)\
     {\
-       CPU.BranchSkip = FALSE;\
-       if (!Settings.SoundSkipMethod) {\
-           if( CPU.PC - CPU.PCBase > OpAddress)\
-               return;\
-       } else \
-       if (Settings.SoundSkipMethod == 1)\
-           return;\
-       if (Settings.SoundSkipMethod == 3)\
-           if( CPU.PC - CPU.PCBase > OpAddress)\
-               return;\
-           else\
-               CPU.PC = CPU.PCBase + OpAddress;\
-    }
+               CPU.BranchSkip = FALSE;\
+               if (!Settings.SoundSkipMethod) {\
+                       if( CPU.PC - CPU.PCBase > OpAddress)\
+                           return;\
+               } else if (Settings.SoundSkipMethod == 1) {\
+                       return;\
+               } else if (Settings.SoundSkipMethod == 3) {\
+                       if( CPU.PC - CPU.PCBase > OpAddress)\
+                           return;\
+                       else\
+                               CPU.PC = CPU.PCBase + OpAddress;\
+               }\
+       }
 
 #define BranchCheck2()\
-    if( CPU.BranchSkip)\
+    if (CPU.BranchSkip)\
     {\
-       CPU.BranchSkip = FALSE;\
-       if (!Settings.SoundSkipMethod) {\
-           if( CPU.PC - CPU.PCBase > OpAddress)\
-               return;\
-       } else \
-       if (Settings.SoundSkipMethod == 1)\
-           CPU.PC = CPU.PCBase + OpAddress;\
-       if (Settings.SoundSkipMethod == 3)\
-           if (CPU.PC - CPU.PCBase > OpAddress)\
-               return;\
-           else\
-               CPU.PC = CPU.PCBase + OpAddress;\
+               CPU.BranchSkip = FALSE;\
+               if (!Settings.SoundSkipMethod) {\
+                       if( CPU.PC - CPU.PCBase > OpAddress)\
+                           return;\
+               } else if (Settings.SoundSkipMethod == 1) {\
+                       CPU.PC = CPU.PCBase + OpAddress;\
+               } else if (Settings.SoundSkipMethod == 3) {\
+                       if (CPU.PC - CPU.PCBase > OpAddress)\
+                           return;\
+                       else\
+                               CPU.PC = CPU.PCBase + OpAddress;\
+               }\
     }
+
 #else
 #define BranchCheck0()
 #define BranchCheck1()
@@ -3894,7 +3895,142 @@ static void OpDB ()
 // Reserved S9xOpcode
 static void Op42 ()
 {
-       // TODO: Implement (speedhacks in i386)
+#if defined(CPU_SHUTDOWN) && !defined(SA1_OPCODES)
+
+       CPU.WaitAddress = NULL;
+       if (Settings.SA1) S9xSA1ExecuteDuringSleep ();
+
+       ApuSync();\r\r#ifdef VAR_CYCLES
+       CPU.Cycles += CPU.MemSpeed;
+#endif
+
+       //relative
+       int8 b = *CPU.PC;
+       CPU.PC++;
+
+       int8 BranchOffset = ((b & 0xF) | 0xF0);
+       uint16 OpAddress = (int)(CPU.PC - CPU.PCBase) + BranchOffset;
+
+       // Assume we're going to branch
+#ifdef VAR_CYCLES
+       CPU.Cycles += ONE_CYCLE;
+#else
+       CPU.Cycles++;
+#endif
+
+       switch (b >> 4) {
+       case 0x1: //BPL
+               BranchCheck1 ();
+               if (!CheckNegative ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0x3: //BMI
+               BranchCheck1 ();
+               if (CheckNegative ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0x5: //BVC
+               BranchCheck0 ();
+               if (!CheckOverflow ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0x7: //BVS
+               BranchCheck0 ();
+               if (CheckOverflow ()) {
+                               CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+                       }
+               return;
+       case 0x8: //BRA
+               CPU.PC = CPU.PCBase + OpAddress;
+#              ifdef VAR_CYCLES
+                       CPU.Cycles += ONE_CYCLE;
+#              else
+                       CPU.Cycles++;
+#              endif
+               CPUShutdown ();
+               return;
+       case 0x9: //BCC
+               BranchCheck0 ();
+           if (!CheckCarry ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0xB: //BCS
+               BranchCheck0 ();
+               if (CheckCarry ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0xD: //BNE
+               BranchCheck1 ();
+               if (!CheckZero ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                       CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+               }
+               return;
+       case 0xF: //BEQ
+               BranchCheck2 ();
+               if (CheckZero ()) {
+                       CPU.PC = CPU.PCBase + OpAddress;
+#                      ifdef VAR_CYCLES
+                               CPU.Cycles += ONE_CYCLE;
+#                      else
+                               CPU.Cycles++;
+#                      endif
+                       CPUShutdown ();
+                       }
+               return;
+#ifdef DEBUG
+       default:
+               printf("Invalid Op42 branch type %hx\n", b >> 4);
+               return;
+#endif
+       }
+#endif
 }
 
 /**********************************************************************************************/
@@ -4125,3 +4261,4 @@ struct SOpcodes S9xOpcodesM0X1[256] =
     {OpFAX1},    {OpFB},      {OpFC},      {OpFDM0},    {OpFEM0},
     {OpFFM0}
 };
+