#include "hw/isa.h"
#include "exec-all.h"
-
-void register_machines(void)
-{
- qemu_register_machine(&pc_machine);
- qemu_register_machine(&isapc_machine);
-}
+#include "kvm.h"
static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
{
int32_t a20_mask;
int i;
+ cpu_synchronize_state(env, 0);
+
for(i = 0; i < CPU_NB_REGS; i++)
qemu_put_betls(f, &env->regs[i]);
qemu_put_betls(f, &env->eip);
cpu_put_seg(f, &env->idt);
qemu_put_be32s(f, &env->sysenter_cs);
- qemu_put_be32s(f, &env->sysenter_esp);
- qemu_put_be32s(f, &env->sysenter_eip);
+ qemu_put_betls(f, &env->sysenter_esp);
+ qemu_put_betls(f, &env->sysenter_eip);
qemu_put_betls(f, &env->cr[0]);
qemu_put_betls(f, &env->cr[2]);
/* MMU */
a20_mask = (int32_t) env->a20_mask;
- qemu_put_be32s(f, &a20_mask);
+ qemu_put_sbe32s(f, &a20_mask);
/* XMM */
qemu_put_be32s(f, &env->mxcsr);
qemu_put_be16s(f, &env->intercept_dr_write);
qemu_put_be32s(f, &env->intercept_exceptions);
qemu_put_8s(f, &env->v_tpr);
+
+ /* MTRRs */
+ for(i = 0; i < 11; i++)
+ qemu_put_be64s(f, &env->mtrr_fixed[i]);
+ qemu_put_be64s(f, &env->mtrr_deftype);
+ for(i = 0; i < 8; i++) {
+ qemu_put_be64s(f, &env->mtrr_var[i].base);
+ qemu_put_be64s(f, &env->mtrr_var[i].mask);
+ }
+
+ for (i = 0; i < sizeof(env->interrupt_bitmap)/8; i++) {
+ qemu_put_be64s(f, &env->interrupt_bitmap[i]);
+ }
+ qemu_put_be64s(f, &env->tsc);
+ qemu_put_be32s(f, &env->mp_state);
}
#ifdef USE_X86LDOUBLE
uint16_t fpus, fpuc, fptag, fpregs_format;
int32_t a20_mask;
- if (version_id != 3 && version_id != 4 && version_id != 5
- && version_id != 6)
+ if (version_id < 3 || version_id > CPU_SAVE_VERSION)
return -EINVAL;
for(i = 0; i < CPU_NB_REGS; i++)
qemu_get_betls(f, &env->regs[i]);
cpu_get_seg(f, &env->idt);
qemu_get_be32s(f, &env->sysenter_cs);
- qemu_get_be32s(f, &env->sysenter_esp);
- qemu_get_be32s(f, &env->sysenter_eip);
+ if (version_id >= 7) {
+ qemu_get_betls(f, &env->sysenter_esp);
+ qemu_get_betls(f, &env->sysenter_eip);
+ } else {
+ env->sysenter_esp = qemu_get_be32(f);
+ env->sysenter_eip = qemu_get_be32(f);
+ }
qemu_get_betls(f, &env->cr[0]);
qemu_get_betls(f, &env->cr[2]);
for(i = 0; i < 8; i++)
qemu_get_betls(f, &env->dr[i]);
+ cpu_breakpoint_remove_all(env, BP_CPU);
+ cpu_watchpoint_remove_all(env, BP_CPU);
+ for (i = 0; i < 4; i++)
+ hw_breakpoint_insert(env, i);
/* MMU */
- qemu_get_be32s(f, &a20_mask);
+ qemu_get_sbe32s(f, &a20_mask);
env->a20_mask = a20_mask;
qemu_get_be32s(f, &env->mxcsr);
qemu_get_be32s(f, &env->intercept_exceptions);
qemu_get_8s(f, &env->v_tpr);
}
+
+ if (version_id >= 8) {
+ /* MTRRs */
+ for(i = 0; i < 11; i++)
+ qemu_get_be64s(f, &env->mtrr_fixed[i]);
+ qemu_get_be64s(f, &env->mtrr_deftype);
+ for(i = 0; i < 8; i++) {
+ qemu_get_be64s(f, &env->mtrr_var[i].base);
+ qemu_get_be64s(f, &env->mtrr_var[i].mask);
+ }
+ }
+ if (version_id >= 9) {
+ for (i = 0; i < sizeof(env->interrupt_bitmap)/8; i++) {
+ qemu_get_be64s(f, &env->interrupt_bitmap[i]);
+ }
+ qemu_get_be64s(f, &env->tsc);
+ qemu_get_be32s(f, &env->mp_state);
+ }
+
/* XXX: ensure compatiblity for halted bit ? */
/* XXX: compute redundant hflags bits */
env->hflags = hflags;
tlb_flush(env, 1);
+ cpu_synchronize_state(env, 1);
return 0;
}