X-Git-Url: http://git.maemo.org/git/?p=qemu;a=blobdiff_plain;f=hw%2Fmcf5206.c;fp=hw%2Fmcf5206.c;h=b570376a4d2989c3f54b80d25bf478fc62c8dab1;hp=ee41a6118528e634c71d57d077d38c9625ace9c9;hb=a03c3bde4e288e790eccfb8cd45abd8ecbf467dc;hpb=e2ffa1bf065fa199f27d661d495573e9d6059bf1

diff --git a/hw/mcf5206.c b/hw/mcf5206.c
index ee41a61..b570376 100644
--- a/hw/mcf5206.c
+++ b/hw/mcf5206.c
@@ -61,11 +61,9 @@ static void m5206_timer_recalibrate(m5206_timer_state *s)
         prescale *= 16;
 
     if (mode == 3 || mode == 0)
-        cpu_abort(cpu_single_env,
-                  "m5206_timer: mode %d not implemented\n", mode);
+        hw_error("m5206_timer: mode %d not implemented\n", mode);
     if ((s->tmr & TMR_FRR) == 0)
-        cpu_abort(cpu_single_env,
-                  "m5206_timer: free running mode not implemented\n");
+        hw_error("m5206_timer: free running mode not implemented\n");
 
     /* Assume 66MHz system clock.  */
     ptimer_set_freq(s->timer, 66000000 / prescale);
@@ -296,7 +294,7 @@ static uint32_t m5206_mbar_read(m5206_mbar_state *s, uint32_t offset)
     case 0x170: return s->uivr[0];
     case 0x1b0: return s->uivr[1];
     }
-    cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+    hw_error("Bad MBAR read offset 0x%x", (int)offset);
     return 0;
 }
 
@@ -350,7 +348,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
         s->uivr[1] = value;
         break;
     default:
-        cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+        hw_error("Bad MBAR write offset 0x%x", (int)offset);
         break;
     }
 }
@@ -377,7 +375,7 @@ static uint32_t m5206_mbar_readb(void *opaque, target_phys_addr_t offset)
     m5206_mbar_state *s = (m5206_mbar_state *)opaque;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+        hw_error("Bad MBAR read offset 0x%x", (int)offset);
     }
     if (m5206_mbar_width[offset >> 2] > 1) {
         uint16_t val;
@@ -396,7 +394,7 @@ static uint32_t m5206_mbar_readw(void *opaque, target_phys_addr_t offset)
     int width;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+        hw_error("Bad MBAR read offset 0x%x", (int)offset);
     }
     width = m5206_mbar_width[offset >> 2];
     if (width > 2) {
@@ -420,7 +418,7 @@ static uint32_t m5206_mbar_readl(void *opaque, target_phys_addr_t offset)
     int width;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+        hw_error("Bad MBAR read offset 0x%x", (int)offset);
     }
     width = m5206_mbar_width[offset >> 2];
     if (width < 4) {
@@ -444,7 +442,7 @@ static void m5206_mbar_writeb(void *opaque, target_phys_addr_t offset,
     int width;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+        hw_error("Bad MBAR write offset 0x%x", (int)offset);
     }
     width = m5206_mbar_width[offset >> 2];
     if (width > 1) {
@@ -468,7 +466,7 @@ static void m5206_mbar_writew(void *opaque, target_phys_addr_t offset,
     int width;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+        hw_error("Bad MBAR write offset 0x%x", (int)offset);
     }
     width = m5206_mbar_width[offset >> 2];
     if (width > 2) {
@@ -496,7 +494,7 @@ static void m5206_mbar_writel(void *opaque, target_phys_addr_t offset,
     int width;
     offset &= 0x3ff;
     if (offset > 0x200) {
-        cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+        hw_error("Bad MBAR write offset 0x%x", (int)offset);
     }
     width = m5206_mbar_width[offset >> 2];
     if (width < 4) {