Implement ARMv7 cp15 cache ID registers.
authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
Fri, 19 Dec 2008 13:37:53 +0000 (13:37 +0000)
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
Fri, 19 Dec 2008 13:37:53 +0000 (13:37 +0000)
commita49ea279c4fcda7e6558bfe5b32a8d9aff0dd05b
treeda6b005397596cda89d55c8ec49a6039088f5d4b
parentfe1479c3ad177df09d465338d5421a5f3b857f91
Implement ARMv7 cp15 cache ID registers.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6105 c046a42c-6fe2-441c-8c8c-71466251a162
target-arm/cpu.h
target-arm/helper.c