target-ppc: avoid nop to override next instruction
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 29 Mar 2009 01:18:03 +0000 (01:18 +0000)
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 29 Mar 2009 01:18:03 +0000 (01:18 +0000)
While searching PC, always store the pc of a new instruction.
Instructions that didn't generate tcg code (such as nop) prevented the
next one to be referenced.

Based on patch for target-alpha, r6930.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6931 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/translate.c

index 952ee99..870aec5 100644 (file)
@@ -8213,10 +8213,10 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
                 lj++;
                 while (lj < j)
                     gen_opc_instr_start[lj++] = 0;
-                gen_opc_pc[lj] = ctx.nip;
-                gen_opc_instr_start[lj] = 1;
-                gen_opc_icount[lj] = num_insns;
             }
+            gen_opc_pc[lj] = ctx.nip;
+            gen_opc_instr_start[lj] = 1;
+            gen_opc_icount[lj] = num_insns;
         }
         LOG_DISAS("----------------\n");
         LOG_DISAS("nip=" ADDRX " super=%d ir=%d\n",