2 * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
4 * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
5 * Jerremy Koot (jkoot@snes9x.com)
7 * Super FX C emulator code
8 * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
10 * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
12 * DSP1 emulator code (c) Copyright 1998 Ivar_Demo_ and Gary Henderson.
13 * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
14 * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
16 * DOS port code contains the works of other authors. See headers in
19 * Snes9x homepage: http://www.snes9x.com
21 * Permission to usecopymodify and distribute Snes9x in both binary and
22 * source formfor non-commercial purposesis hereby granted without fee,
23 * providing that this license information and copyright notice appear with
24 * all copies and any derived work.
26 * This software is provided 'as-is'without any express or implied
27 * warranty. In no event shall the authors be held liable for any damages
28 * arising from the use of this software.
30 * Snes9x is freeware for PERSONAL USE only. Commercial users should
31 * seek permission of the copyright holders first. Commercial use includes
32 * charging money for Snes9x or software derived from Snes9x.
34 * The copyright holders request that bug fixes and improvements to the code
35 * should be forwarded to them so everyone can benefit from the modifications
38 * Super NES and Super Nintendo Entertainment System are trademarks of
39 * Nintendo Co.Limited and its subsidiary companies.
41 /**********************************************************************************************/
42 /* CPU-S9xOpcodes.CPP */
43 /* This file contains all the opcodes */
44 /**********************************************************************************************/
59 #define ApuSync() do { \
60 CPU.Cycles = CPU.NextEvent; \
61 if (CPU.APU_APUExecuting) { \
62 ICPU.CPUExecuting = FALSE; \
66 } while (CPU.APU_Cycles < CPU.NextEvent); \
67 ICPU.CPUExecuting = TRUE; \
72 /* ADC *************************************************************************************** */
75 long OpAddress = Immediate8 ();
81 long OpAddress = Immediate16 ();
87 long OpAddress = Direct ();
93 long OpAddress = Direct ();
99 long OpAddress = DirectIndexedX ();
103 static void Op75M0 ()
105 long OpAddress = DirectIndexedX ();
109 static void Op72M1 ()
111 long OpAddress = DirectIndirect ();
115 static void Op72M0 ()
117 long OpAddress = DirectIndirect ();
121 static void Op61M1 ()
123 long OpAddress = DirectIndexedIndirect ();
127 static void Op61M0 ()
129 long OpAddress = DirectIndexedIndirect ();
133 static void Op71M1 ()
135 long OpAddress = DirectIndirectIndexed ();
139 static void Op71M0 ()
141 long OpAddress = DirectIndirectIndexed ();
145 static void Op67M1 ()
147 long OpAddress = DirectIndirectLong ();
151 static void Op67M0 ()
153 long OpAddress = DirectIndirectLong ();
157 static void Op77M1 ()
159 long OpAddress = DirectIndirectIndexedLong ();
163 static void Op77M0 ()
165 long OpAddress = DirectIndirectIndexedLong ();
169 static void Op6DM1 ()
171 long OpAddress = Absolute ();
175 static void Op6DM0 ()
177 long OpAddress = Absolute ();
181 static void Op7DM1 ()
183 long OpAddress = AbsoluteIndexedX ();
187 static void Op7DM0 ()
189 long OpAddress = AbsoluteIndexedX ();
193 static void Op79M1 ()
195 long OpAddress = AbsoluteIndexedY ();
199 static void Op79M0 ()
201 long OpAddress = AbsoluteIndexedY ();
205 static void Op6FM1 ()
207 long OpAddress = AbsoluteLong ();
211 static void Op6FM0 ()
213 long OpAddress = AbsoluteLong ();
217 static void Op7FM1 ()
219 long OpAddress = AbsoluteLongIndexedX ();
223 static void Op7FM0 ()
225 long OpAddress = AbsoluteLongIndexedX ();
229 static void Op63M1 ()
231 long OpAddress = StackRelative ();
235 static void Op63M0 ()
237 long OpAddress = StackRelative ();
241 static void Op73M1 ()
243 long OpAddress = StackRelativeIndirectIndexed ();
247 static void Op73M0 ()
249 long OpAddress = StackRelativeIndirectIndexed ();
253 /**********************************************************************************************/
255 /* AND *************************************************************************************** */
256 static void Op29M1 ()
258 Registers.AL &= *CPU.PC++;
260 CPU.Cycles += CPU.MemSpeed;
262 SETZN8 (Registers.AL);
265 static void Op29M0 ()
267 #ifdef FAST_LSB_WORD_ACCESS
268 Registers.A.W &= *(uint16 *) CPU.PC;
270 Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
274 CPU.Cycles += CPU.MemSpeedx2;
276 SETZN16 (Registers.A.W);
279 static void Op25M1 ()
281 long OpAddress = Direct ();
285 static void Op25M0 ()
287 long OpAddress = Direct ();
291 static void Op35M1 ()
293 long OpAddress = DirectIndexedX ();
297 static void Op35M0 ()
299 long OpAddress = DirectIndexedX ();
303 static void Op32M1 ()
305 long OpAddress = DirectIndirect ();
309 static void Op32M0 ()
311 long OpAddress = DirectIndirect ();
315 static void Op21M1 ()
317 long OpAddress = DirectIndexedIndirect ();
321 static void Op21M0 ()
323 long OpAddress = DirectIndexedIndirect ();
327 static void Op31M1 ()
329 long OpAddress = DirectIndirectIndexed ();
333 static void Op31M0 ()
335 long OpAddress = DirectIndirectIndexed ();
339 static void Op27M1 ()
341 long OpAddress = DirectIndirectLong ();
345 static void Op27M0 ()
347 long OpAddress = DirectIndirectLong ();
351 static void Op37M1 ()
353 long OpAddress = DirectIndirectIndexedLong ();
357 static void Op37M0 ()
359 long OpAddress = DirectIndirectIndexedLong ();
363 static void Op2DM1 ()
365 long OpAddress = Absolute ();
369 static void Op2DM0 ()
371 long OpAddress = Absolute ();
375 static void Op3DM1 ()
377 long OpAddress = AbsoluteIndexedX ();
381 static void Op3DM0 ()
383 long OpAddress = AbsoluteIndexedX ();
387 static void Op39M1 ()
389 long OpAddress = AbsoluteIndexedY ();
393 static void Op39M0 ()
395 long OpAddress = AbsoluteIndexedY ();
399 static void Op2FM1 ()
401 long OpAddress = AbsoluteLong ();
405 static void Op2FM0 ()
407 long OpAddress = AbsoluteLong ();
411 static void Op3FM1 ()
413 long OpAddress = AbsoluteLongIndexedX ();
417 static void Op3FM0 ()
419 long OpAddress = AbsoluteLongIndexedX ();
423 static void Op23M1 ()
425 long OpAddress = StackRelative ();
429 static void Op23M0 ()
431 long OpAddress = StackRelative ();
435 static void Op33M1 ()
437 long OpAddress = StackRelativeIndirectIndexed ();
441 static void Op33M0 ()
443 long OpAddress = StackRelativeIndirectIndexed ();
446 /**********************************************************************************************/
448 /* ASL *************************************************************************************** */
449 static void Op0AM1 ()
454 static void Op0AM0 ()
459 static void Op06M1 ()
461 long OpAddress = Direct ();
465 static void Op06M0 ()
467 long OpAddress = Direct ();
471 static void Op16M1 ()
473 long OpAddress = DirectIndexedX ();
477 static void Op16M0 ()
479 long OpAddress = DirectIndexedX ();
483 static void Op0EM1 ()
485 long OpAddress = Absolute ();
489 static void Op0EM0 ()
491 long OpAddress = Absolute ();
495 static void Op1EM1 ()
497 long OpAddress = AbsoluteIndexedX ();
501 static void Op1EM0 ()
503 long OpAddress = AbsoluteIndexedX ();
506 /**********************************************************************************************/
508 /* BIT *************************************************************************************** */
509 static void Op89M1 ()
511 ICPU._Zero = Registers.AL & *CPU.PC++;
513 CPU.Cycles += CPU.MemSpeed;
517 static void Op89M0 ()
519 #ifdef FAST_LSB_WORD_ACCESS
520 ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0;
522 ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
525 CPU.Cycles += CPU.MemSpeedx2;
530 static void Op24M1 ()
532 long OpAddress = Direct ();
536 static void Op24M0 ()
538 long OpAddress = Direct ();
542 static void Op34M1 ()
544 long OpAddress = DirectIndexedX ();
548 static void Op34M0 ()
550 long OpAddress = DirectIndexedX ();
554 static void Op2CM1 ()
556 long OpAddress = Absolute ();
560 static void Op2CM0 ()
562 long OpAddress = Absolute ();
566 static void Op3CM1 ()
568 long OpAddress = AbsoluteIndexedX ();
572 static void Op3CM0 ()
574 long OpAddress = AbsoluteIndexedX ();
577 /**********************************************************************************************/
579 /* CMP *************************************************************************************** */
580 static void OpC9M1 ()
582 int32 Int32 = (int) Registers.AL - (int) *CPU.PC++;
583 ICPU._Carry = Int32 >= 0;
584 SETZN8 ((uint8) Int32);
586 CPU.Cycles += CPU.MemSpeed;
590 static void OpC9M0 ()
592 #ifdef FAST_LSB_WORD_ACCESS
593 int32 Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC;
595 int32 Int32 = (long) Registers.A.W -
596 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
598 ICPU._Carry = Int32 >= 0;
599 SETZN16 ((uint16) Int32);
602 CPU.Cycles += CPU.MemSpeedx2;
606 static void OpC5M1 ()
608 long OpAddress = Direct ();
612 static void OpC5M0 ()
614 long OpAddress = Direct ();
618 static void OpD5M1 ()
620 long OpAddress = DirectIndexedX ();
624 static void OpD5M0 ()
626 long OpAddress = DirectIndexedX ();
630 static void OpD2M1 ()
632 long OpAddress = DirectIndirect ();
636 static void OpD2M0 ()
638 long OpAddress = DirectIndirect ();
642 static void OpC1M1 ()
644 long OpAddress = DirectIndexedIndirect ();
648 static void OpC1M0 ()
650 long OpAddress = DirectIndexedIndirect ();
654 static void OpD1M1 ()
656 long OpAddress = DirectIndirectIndexed ();
660 static void OpD1M0 ()
662 long OpAddress = DirectIndirectIndexed ();
666 static void OpC7M1 ()
668 long OpAddress = DirectIndirectLong ();
672 static void OpC7M0 ()
674 long OpAddress = DirectIndirectLong ();
678 static void OpD7M1 ()
680 long OpAddress = DirectIndirectIndexedLong ();
684 static void OpD7M0 ()
686 long OpAddress = DirectIndirectIndexedLong ();
690 static void OpCDM1 ()
692 long OpAddress = Absolute ();
696 static void OpCDM0 ()
698 long OpAddress = Absolute ();
702 static void OpDDM1 ()
704 long OpAddress = AbsoluteIndexedX ();
708 static void OpDDM0 ()
710 long OpAddress = AbsoluteIndexedX ();
714 static void OpD9M1 ()
716 long OpAddress = AbsoluteIndexedY ();
720 static void OpD9M0 ()
722 long OpAddress = AbsoluteIndexedY ();
726 static void OpCFM1 ()
728 long OpAddress = AbsoluteLong ();
732 static void OpCFM0 ()
734 long OpAddress = AbsoluteLong ();
738 static void OpDFM1 ()
740 long OpAddress = AbsoluteLongIndexedX ();
744 static void OpDFM0 ()
746 long OpAddress = AbsoluteLongIndexedX ();
750 static void OpC3M1 ()
752 long OpAddress = StackRelative ();
756 static void OpC3M0 ()
758 long OpAddress = StackRelative ();
762 static void OpD3M1 ()
764 long OpAddress = StackRelativeIndirectIndexed ();
768 static void OpD3M0 ()
770 long OpAddress = StackRelativeIndirectIndexed ();
774 /**********************************************************************************************/
776 /* CMX *************************************************************************************** */
777 static void OpE0X1 ()
779 int32 Int32 = (int) Registers.XL - (int) *CPU.PC++;
780 ICPU._Carry = Int32 >= 0;
781 SETZN8 ((uint8) Int32);
783 CPU.Cycles += CPU.MemSpeed;
787 static void OpE0X0 ()
789 #ifdef FAST_LSB_WORD_ACCESS
790 int32 Int32 = (long) Registers.X.W - (long) *(uint16 *) CPU.PC;
792 int32 Int32 = (long) Registers.X.W -
793 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
795 ICPU._Carry = Int32 >= 0;
796 SETZN16 ((uint16) Int32);
799 CPU.Cycles += CPU.MemSpeedx2;
803 static void OpE4X1 ()
805 long OpAddress = Direct ();
809 static void OpE4X0 ()
811 long OpAddress = Direct ();
815 static void OpECX1 ()
817 long OpAddress = Absolute ();
821 static void OpECX0 ()
823 long OpAddress = Absolute ();
827 /**********************************************************************************************/
829 /* CMY *************************************************************************************** */
830 static void OpC0X1 ()
832 int32 Int32 = (int) Registers.YL - (int) *CPU.PC++;
833 ICPU._Carry = Int32 >= 0;
834 SETZN8 ((uint8) Int32);
836 CPU.Cycles += CPU.MemSpeed;
840 static void OpC0X0 ()
842 #ifdef FAST_LSB_WORD_ACCESS
843 int32 Int32 = (long) Registers.Y.W - (long) *(uint16 *) CPU.PC;
845 int32 Int32 = (long) Registers.Y.W -
846 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
848 ICPU._Carry = Int32 >= 0;
849 SETZN16 ((uint16) Int32);
852 CPU.Cycles += CPU.MemSpeedx2;
856 static void OpC4X1 ()
858 long OpAddress = Direct ();
862 static void OpC4X0 ()
864 long OpAddress = Direct ();
868 static void OpCCX1 ()
870 long OpAddress = Absolute ();
874 static void OpCCX0 ()
876 long OpAddress = Absolute ();
880 /**********************************************************************************************/
882 /* DEC *************************************************************************************** */
883 static void Op3AM1 ()
888 static void Op3AM0 ()
893 static void OpC6M1 ()
895 long OpAddress = Direct ();
899 static void OpC6M0 ()
901 long OpAddress = Direct ();
905 static void OpD6M1 ()
907 long OpAddress = DirectIndexedX ();
911 static void OpD6M0 ()
913 long OpAddress = DirectIndexedX ();
917 static void OpCEM1 ()
919 long OpAddress = Absolute ();
923 static void OpCEM0 ()
925 long OpAddress = Absolute ();
929 static void OpDEM1 ()
931 long OpAddress = AbsoluteIndexedX ();
935 static void OpDEM0 ()
937 long OpAddress = AbsoluteIndexedX ();
941 /**********************************************************************************************/
943 /* EOR *************************************************************************************** */
944 static void Op49M1 ()
946 Registers.AL ^= *CPU.PC++;
948 CPU.Cycles += CPU.MemSpeed;
950 SETZN8 (Registers.AL);
953 static void Op49M0 ()
955 #ifdef FAST_LSB_WORD_ACCESS
956 Registers.A.W ^= *(uint16 *) CPU.PC;
958 Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8);
962 CPU.Cycles += CPU.MemSpeedx2;
964 SETZN16 (Registers.A.W);
967 static void Op45M1 ()
969 long OpAddress = Direct ();
973 static void Op45M0 ()
975 long OpAddress = Direct ();
979 static void Op55M1 ()
981 long OpAddress = DirectIndexedX ();
985 static void Op55M0 ()
987 long OpAddress = DirectIndexedX ();
991 static void Op52M1 ()
993 long OpAddress = DirectIndirect ();
997 static void Op52M0 ()
999 long OpAddress = DirectIndirect ();
1003 static void Op41M1 ()
1005 long OpAddress = DirectIndexedIndirect ();
1009 static void Op41M0 ()
1011 long OpAddress = DirectIndexedIndirect ();
1015 static void Op51M1 ()
1017 long OpAddress = DirectIndirectIndexed ();
1021 static void Op51M0 ()
1023 long OpAddress = DirectIndirectIndexed ();
1027 static void Op47M1 ()
1029 long OpAddress = DirectIndirectLong ();
1033 static void Op47M0 ()
1035 long OpAddress = DirectIndirectLong ();
1039 static void Op57M1 ()
1041 long OpAddress = DirectIndirectIndexedLong ();
1045 static void Op57M0 ()
1047 long OpAddress = DirectIndirectIndexedLong ();
1051 static void Op4DM1 ()
1053 long OpAddress = Absolute ();
1057 static void Op4DM0 ()
1059 long OpAddress = Absolute ();
1063 static void Op5DM1 ()
1065 long OpAddress = AbsoluteIndexedX ();
1069 static void Op5DM0 ()
1071 long OpAddress = AbsoluteIndexedX ();
1075 static void Op59M1 ()
1077 long OpAddress = AbsoluteIndexedY ();
1081 static void Op59M0 ()
1083 long OpAddress = AbsoluteIndexedY ();
1087 static void Op4FM1 ()
1089 long OpAddress = AbsoluteLong ();
1093 static void Op4FM0 ()
1095 long OpAddress = AbsoluteLong ();
1099 static void Op5FM1 ()
1101 long OpAddress = AbsoluteLongIndexedX ();
1105 static void Op5FM0 ()
1107 long OpAddress = AbsoluteLongIndexedX ();
1111 static void Op43M1 ()
1113 long OpAddress = StackRelative ();
1117 static void Op43M0 ()
1119 long OpAddress = StackRelative ();
1123 static void Op53M1 ()
1125 long OpAddress = StackRelativeIndirectIndexed ();
1129 static void Op53M0 ()
1131 long OpAddress = StackRelativeIndirectIndexed ();
1135 /**********************************************************************************************/
1137 /* INC *************************************************************************************** */
1138 static void Op1AM1 ()
1143 static void Op1AM0 ()
1148 static void OpE6M1 ()
1150 long OpAddress = Direct ();
1154 static void OpE6M0 ()
1156 long OpAddress = Direct ();
1160 static void OpF6M1 ()
1162 long OpAddress = DirectIndexedX ();
1166 static void OpF6M0 ()
1168 long OpAddress = DirectIndexedX ();
1172 static void OpEEM1 ()
1174 long OpAddress = Absolute ();
1178 static void OpEEM0 ()
1180 long OpAddress = Absolute ();
1184 static void OpFEM1 ()
1186 long OpAddress = AbsoluteIndexedX ();
1190 static void OpFEM0 ()
1192 long OpAddress = AbsoluteIndexedX ();
1196 /**********************************************************************************************/
1197 /* LDA *************************************************************************************** */
1198 static void OpA9M1 ()
1200 Registers.AL = *CPU.PC++;
1202 CPU.Cycles += CPU.MemSpeed;
1204 SETZN8 (Registers.AL);
1207 static void OpA9M0 ()
1209 #ifdef FAST_LSB_WORD_ACCESS
1210 Registers.A.W = *(uint16 *) CPU.PC;
1212 Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1217 CPU.Cycles += CPU.MemSpeedx2;
1219 SETZN16 (Registers.A.W);
1222 static void OpA5M1 ()
1224 long OpAddress = Direct ();
1228 static void OpA5M0 ()
1230 long OpAddress = Direct ();
1234 static void OpB5M1 ()
1236 long OpAddress = DirectIndexedX ();
1240 static void OpB5M0 ()
1242 long OpAddress = DirectIndexedX ();
1246 static void OpB2M1 ()
1248 long OpAddress = DirectIndirect ();
1252 static void OpB2M0 ()
1254 long OpAddress = DirectIndirect ();
1258 static void OpA1M1 ()
1260 long OpAddress = DirectIndexedIndirect ();
1264 static void OpA1M0 ()
1266 long OpAddress = DirectIndexedIndirect ();
1270 static void OpB1M1 ()
1272 long OpAddress = DirectIndirectIndexed ();
1276 static void OpB1M0 ()
1278 long OpAddress = DirectIndirectIndexed ();
1282 static void OpA7M1 ()
1284 long OpAddress = DirectIndirectLong ();
1288 static void OpA7M0 ()
1290 long OpAddress = DirectIndirectLong ();
1294 static void OpB7M1 ()
1296 long OpAddress = DirectIndirectIndexedLong ();
1300 static void OpB7M0 ()
1302 long OpAddress = DirectIndirectIndexedLong ();
1306 static void OpADM1 ()
1308 long OpAddress = Absolute ();
1312 static void OpADM0 ()
1314 long OpAddress = Absolute ();
1318 static void OpBDM1 ()
1320 long OpAddress = AbsoluteIndexedX ();
1324 static void OpBDM0 ()
1326 long OpAddress = AbsoluteIndexedX ();
1330 static void OpB9M1 ()
1332 long OpAddress = AbsoluteIndexedY ();
1336 static void OpB9M0 ()
1338 long OpAddress = AbsoluteIndexedY ();
1342 static void OpAFM1 ()
1344 long OpAddress = AbsoluteLong ();
1348 static void OpAFM0 ()
1350 long OpAddress = AbsoluteLong ();
1354 static void OpBFM1 ()
1356 long OpAddress = AbsoluteLongIndexedX ();
1360 static void OpBFM0 ()
1362 long OpAddress = AbsoluteLongIndexedX ();
1366 static void OpA3M1 ()
1368 long OpAddress = StackRelative ();
1372 static void OpA3M0 ()
1374 long OpAddress = StackRelative ();
1378 static void OpB3M1 ()
1380 long OpAddress = StackRelativeIndirectIndexed ();
1384 static void OpB3M0 ()
1386 long OpAddress = StackRelativeIndirectIndexed ();
1390 /**********************************************************************************************/
1392 /* LDX *************************************************************************************** */
1393 static void OpA2X1 ()
1395 Registers.XL = *CPU.PC++;
1397 CPU.Cycles += CPU.MemSpeed;
1399 SETZN8 (Registers.XL);
1402 static void OpA2X0 ()
1404 #ifdef FAST_LSB_WORD_ACCESS
1405 Registers.X.W = *(uint16 *) CPU.PC;
1407 Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1411 CPU.Cycles += CPU.MemSpeedx2;
1413 SETZN16 (Registers.X.W);
1416 static void OpA6X1 ()
1418 long OpAddress = Direct ();
1422 static void OpA6X0 ()
1424 long OpAddress = Direct ();
1428 static void OpB6X1 ()
1430 long OpAddress = DirectIndexedY ();
1434 static void OpB6X0 ()
1436 long OpAddress = DirectIndexedY ();
1440 static void OpAEX1 ()
1442 long OpAddress = Absolute ();
1446 static void OpAEX0 ()
1448 long OpAddress = Absolute ();
1452 static void OpBEX1 ()
1454 long OpAddress = AbsoluteIndexedY ();
1458 static void OpBEX0 ()
1460 long OpAddress = AbsoluteIndexedY ();
1463 /**********************************************************************************************/
1465 /* LDY *************************************************************************************** */
1466 static void OpA0X1 ()
1468 Registers.YL = *CPU.PC++;
1470 CPU.Cycles += CPU.MemSpeed;
1472 SETZN8 (Registers.YL);
1475 static void OpA0X0 ()
1477 #ifdef FAST_LSB_WORD_ACCESS
1478 Registers.Y.W = *(uint16 *) CPU.PC;
1480 Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1485 CPU.Cycles += CPU.MemSpeedx2;
1487 SETZN16 (Registers.Y.W);
1490 static void OpA4X1 ()
1492 long OpAddress = Direct ();
1496 static void OpA4X0 ()
1498 long OpAddress = Direct ();
1502 static void OpB4X1 ()
1504 long OpAddress = DirectIndexedX ();
1508 static void OpB4X0 ()
1510 long OpAddress = DirectIndexedX ();
1514 static void OpACX1 ()
1516 long OpAddress = Absolute ();
1520 static void OpACX0 ()
1522 long OpAddress = Absolute ();
1526 static void OpBCX1 ()
1528 long OpAddress = AbsoluteIndexedX ();
1532 static void OpBCX0 ()
1534 long OpAddress = AbsoluteIndexedX ();
1537 /**********************************************************************************************/
1539 /* LSR *************************************************************************************** */
1540 static void Op4AM1 ()
1545 static void Op4AM0 ()
1550 static void Op46M1 ()
1552 long OpAddress = Direct ();
1556 static void Op46M0 ()
1558 long OpAddress = Direct ();
1562 static void Op56M1 ()
1564 long OpAddress = DirectIndexedX ();
1568 static void Op56M0 ()
1570 long OpAddress = DirectIndexedX ();
1574 static void Op4EM1 ()
1576 long OpAddress = Absolute ();
1580 static void Op4EM0 ()
1582 long OpAddress = Absolute ();
1586 static void Op5EM1 ()
1588 long OpAddress = AbsoluteIndexedX ();
1592 static void Op5EM0 ()
1594 long OpAddress = AbsoluteIndexedX ();
1598 /**********************************************************************************************/
1600 /* ORA *************************************************************************************** */
1601 static void Op09M1 ()
1603 Registers.AL |= *CPU.PC++;
1605 CPU.Cycles += CPU.MemSpeed;
1607 SETZN8 (Registers.AL);
1610 static void Op09M0 ()
1612 #ifdef FAST_LSB_WORD_ACCESS
1613 Registers.A.W |= *(uint16 *) CPU.PC;
1615 Registers.A.W |= *CPU.PC + (*(CPU.PC + 1) << 8);
1619 CPU.Cycles += CPU.MemSpeedx2;
1621 SETZN16 (Registers.A.W);
1624 static void Op05M1 ()
1626 long OpAddress = Direct ();
1630 static void Op05M0 ()
1632 long OpAddress = Direct ();
1636 static void Op15M1 ()
1638 long OpAddress = DirectIndexedX ();
1642 static void Op15M0 ()
1644 long OpAddress = DirectIndexedX ();
1648 static void Op12M1 ()
1650 long OpAddress = DirectIndirect ();
1654 static void Op12M0 ()
1656 long OpAddress = DirectIndirect ();
1660 static void Op01M1 ()
1662 long OpAddress = DirectIndexedIndirect ();
1666 static void Op01M0 ()
1668 long OpAddress = DirectIndexedIndirect ();
1672 static void Op11M1 ()
1674 long OpAddress = DirectIndirectIndexed ();
1678 static void Op11M0 ()
1680 long OpAddress = DirectIndirectIndexed ();
1684 static void Op07M1 ()
1686 long OpAddress = DirectIndirectLong ();
1690 static void Op07M0 ()
1692 long OpAddress = DirectIndirectLong ();
1696 static void Op17M1 ()
1698 long OpAddress = DirectIndirectIndexedLong ();
1702 static void Op17M0 ()
1704 long OpAddress = DirectIndirectIndexedLong ();
1708 static void Op0DM1 ()
1710 long OpAddress = Absolute ();
1714 static void Op0DM0 ()
1716 long OpAddress = Absolute ();
1720 static void Op1DM1 ()
1722 long OpAddress = AbsoluteIndexedX ();
1726 static void Op1DM0 ()
1728 long OpAddress = AbsoluteIndexedX ();
1732 static void Op19M1 ()
1734 long OpAddress = AbsoluteIndexedY ();
1738 static void Op19M0 ()
1740 long OpAddress = AbsoluteIndexedY ();
1744 static void Op0FM1 ()
1746 long OpAddress = AbsoluteLong ();
1750 static void Op0FM0 ()
1752 long OpAddress = AbsoluteLong ();
1756 static void Op1FM1 ()
1758 long OpAddress = AbsoluteLongIndexedX ();
1762 static void Op1FM0 ()
1764 long OpAddress = AbsoluteLongIndexedX ();
1768 static void Op03M1 ()
1770 long OpAddress = StackRelative ();
1774 static void Op03M0 ()
1776 long OpAddress = StackRelative ();
1780 static void Op13M1 ()
1782 long OpAddress = StackRelativeIndirectIndexed ();
1786 static void Op13M0 ()
1788 long OpAddress = StackRelativeIndirectIndexed ();
1792 /**********************************************************************************************/
1794 /* ROL *************************************************************************************** */
1795 static void Op2AM1 ()
1800 static void Op2AM0 ()
1805 static void Op26M1 ()
1807 long OpAddress = Direct ();
1811 static void Op26M0 ()
1813 long OpAddress = Direct ();
1817 static void Op36M1 ()
1819 long OpAddress = DirectIndexedX ();
1823 static void Op36M0 ()
1825 long OpAddress = DirectIndexedX ();
1829 static void Op2EM1 ()
1831 long OpAddress = Absolute ();
1835 static void Op2EM0 ()
1837 long OpAddress = Absolute ();
1841 static void Op3EM1 ()
1843 long OpAddress = AbsoluteIndexedX ();
1847 static void Op3EM0 ()
1849 long OpAddress = AbsoluteIndexedX ();
1852 /**********************************************************************************************/
1854 /* ROR *************************************************************************************** */
1855 static void Op6AM1 ()
1860 static void Op6AM0 ()
1865 static void Op66M1 ()
1867 long OpAddress = Direct ();
1871 static void Op66M0 ()
1873 long OpAddress = Direct ();
1877 static void Op76M1 ()
1879 long OpAddress = DirectIndexedX ();
1883 static void Op76M0 ()
1885 long OpAddress = DirectIndexedX ();
1889 static void Op6EM1 ()
1891 long OpAddress = Absolute ();
1895 static void Op6EM0 ()
1897 long OpAddress = Absolute ();
1901 static void Op7EM1 ()
1903 long OpAddress = AbsoluteIndexedX ();
1907 static void Op7EM0 ()
1909 long OpAddress = AbsoluteIndexedX ();
1912 /**********************************************************************************************/
1914 /* SBC *************************************************************************************** */
1915 static void OpE9M1 ()
1917 long OpAddress = Immediate8 ();
1921 static void OpE9M0 ()
1923 long OpAddress = Immediate16 ();
1927 static void OpE5M1 ()
1929 long OpAddress = Direct ();
1933 static void OpE5M0 ()
1935 long OpAddress = Direct ();
1939 static void OpF5M1 ()
1941 long OpAddress = DirectIndexedX ();
1945 static void OpF5M0 ()
1947 long OpAddress = DirectIndexedX ();
1951 static void OpF2M1 ()
1953 long OpAddress = DirectIndirect ();
1957 static void OpF2M0 ()
1959 long OpAddress = DirectIndirect ();
1963 static void OpE1M1 ()
1965 long OpAddress = DirectIndexedIndirect ();
1969 static void OpE1M0 ()
1971 long OpAddress = DirectIndexedIndirect ();
1975 static void OpF1M1 ()
1977 long OpAddress = DirectIndirectIndexed ();
1981 static void OpF1M0 ()
1983 long OpAddress = DirectIndirectIndexed ();
1987 static void OpE7M1 ()
1989 long OpAddress = DirectIndirectLong ();
1993 static void OpE7M0 ()
1995 long OpAddress = DirectIndirectLong ();
1999 static void OpF7M1 ()
2001 long OpAddress = DirectIndirectIndexedLong ();
2005 static void OpF7M0 ()
2007 long OpAddress = DirectIndirectIndexedLong ();
2011 static void OpEDM1 ()
2013 long OpAddress = Absolute ();
2017 static void OpEDM0 ()
2019 long OpAddress = Absolute ();
2023 static void OpFDM1 ()
2025 long OpAddress = AbsoluteIndexedX ();
2029 static void OpFDM0 ()
2031 long OpAddress = AbsoluteIndexedX ();
2035 static void OpF9M1 ()
2037 long OpAddress = AbsoluteIndexedY ();
2041 static void OpF9M0 ()
2043 long OpAddress = AbsoluteIndexedY ();
2047 static void OpEFM1 ()
2049 long OpAddress = AbsoluteLong ();
2053 static void OpEFM0 ()
2055 long OpAddress = AbsoluteLong ();
2059 static void OpFFM1 ()
2061 long OpAddress = AbsoluteLongIndexedX ();
2065 static void OpFFM0 ()
2067 long OpAddress = AbsoluteLongIndexedX ();
2071 static void OpE3M1 ()
2073 long OpAddress = StackRelative ();
2077 static void OpE3M0 ()
2079 long OpAddress = StackRelative ();
2083 static void OpF3M1 ()
2085 long OpAddress = StackRelativeIndirectIndexed ();
2089 static void OpF3M0 ()
2091 long OpAddress = StackRelativeIndirectIndexed ();
2094 /**********************************************************************************************/
2096 /* STA *************************************************************************************** */
2097 static void Op85M1 ()
2099 long OpAddress = Direct ();
2103 static void Op85M0 ()
2105 long OpAddress = Direct ();
2109 static void Op95M1 ()
2111 long OpAddress = DirectIndexedX ();
2115 static void Op95M0 ()
2117 long OpAddress = DirectIndexedX ();
2121 static void Op92M1 ()
2123 long OpAddress = DirectIndirect ();
2127 static void Op92M0 ()
2129 long OpAddress = DirectIndirect ();
2133 static void Op81M1 ()
2135 long OpAddress = DirectIndexedIndirect ();
2139 CPU.Cycles += ONE_CYCLE;
2143 static void Op81M0 ()
2145 long OpAddress = DirectIndexedIndirect ();
2149 CPU.Cycles += ONE_CYCLE;
2153 static void Op91M1 ()
2155 long OpAddress = DirectIndirectIndexed ();
2159 static void Op91M0 ()
2161 long OpAddress = DirectIndirectIndexed ();
2165 static void Op87M1 ()
2167 long OpAddress = DirectIndirectLong ();
2171 static void Op87M0 ()
2173 long OpAddress = DirectIndirectLong ();
2177 static void Op97M1 ()
2179 long OpAddress = DirectIndirectIndexedLong ();
2183 static void Op97M0 ()
2185 long OpAddress = DirectIndirectIndexedLong ();
2189 static void Op8DM1 ()
2191 long OpAddress = Absolute ();
2195 static void Op8DM0 ()
2197 long OpAddress = Absolute ();
2201 static void Op9DM1 ()
2203 long OpAddress = AbsoluteIndexedX ();
2207 static void Op9DM0 ()
2209 long OpAddress = AbsoluteIndexedX ();
2213 static void Op99M1 ()
2215 long OpAddress = AbsoluteIndexedY ();
2219 static void Op99M0 ()
2221 long OpAddress = AbsoluteIndexedY ();
2225 static void Op8FM1 ()
2227 long OpAddress = AbsoluteLong ();
2231 static void Op8FM0 ()
2233 long OpAddress = AbsoluteLong ();
2237 static void Op9FM1 ()
2239 long OpAddress = AbsoluteLongIndexedX ();
2243 static void Op9FM0 ()
2245 long OpAddress = AbsoluteLongIndexedX ();
2249 static void Op83M1 ()
2251 long OpAddress = StackRelative ();
2255 static void Op83M0 ()
2257 long OpAddress = StackRelative ();
2261 static void Op93M1 ()
2263 long OpAddress = StackRelativeIndirectIndexed ();
2267 static void Op93M0 ()
2269 long OpAddress = StackRelativeIndirectIndexed ();
2272 /**********************************************************************************************/
2274 /* STX *************************************************************************************** */
2275 static void Op86X1 ()
2277 long OpAddress = Direct ();
2281 static void Op86X0 ()
2283 long OpAddress = Direct ();
2287 static void Op96X1 ()
2289 long OpAddress = DirectIndexedY ();
2293 static void Op96X0 ()
2295 long OpAddress = DirectIndexedY ();
2299 static void Op8EX1 ()
2301 long OpAddress = Absolute ();
2305 static void Op8EX0 ()
2307 long OpAddress = Absolute ();
2310 /**********************************************************************************************/
2312 /* STY *************************************************************************************** */
2313 static void Op84X1 ()
2315 long OpAddress = Direct ();
2319 static void Op84X0 ()
2321 long OpAddress = Direct ();
2325 static void Op94X1 ()
2327 long OpAddress = DirectIndexedX ();
2331 static void Op94X0 ()
2333 long OpAddress = DirectIndexedX ();
2337 static void Op8CX1 ()
2339 long OpAddress = Absolute ();
2343 static void Op8CX0 ()
2345 long OpAddress = Absolute ();
2348 /**********************************************************************************************/
2350 /* STZ *************************************************************************************** */
2351 static void Op64M1 ()
2353 long OpAddress = Direct ();
2357 static void Op64M0 ()
2359 long OpAddress = Direct ();
2363 static void Op74M1 ()
2365 long OpAddress = DirectIndexedX ();
2369 static void Op74M0 ()
2371 long OpAddress = DirectIndexedX ();
2375 static void Op9CM1 ()
2377 long OpAddress = Absolute ();
2381 static void Op9CM0 ()
2383 long OpAddress = Absolute ();
2387 static void Op9EM1 ()
2389 long OpAddress = AbsoluteIndexedX ();
2393 static void Op9EM0 ()
2395 long OpAddress = AbsoluteIndexedX ();
2399 /**********************************************************************************************/
2401 /* TRB *************************************************************************************** */
2402 static void Op14M1 ()
2404 long OpAddress = Direct ();
2408 static void Op14M0 ()
2410 long OpAddress = Direct ();
2414 static void Op1CM1 ()
2416 long OpAddress = Absolute ();
2420 static void Op1CM0 ()
2422 long OpAddress = Absolute ();
2425 /**********************************************************************************************/
2427 /* TSB *************************************************************************************** */
2428 static void Op04M1 ()
2430 long OpAddress = Direct ();
2434 static void Op04M0 ()
2436 long OpAddress = Direct ();
2440 static void Op0CM1 ()
2442 long OpAddress = Absolute ();
2446 static void Op0CM0 ()
2448 long OpAddress = Absolute ();
2452 /**********************************************************************************************/
2454 /* Branch Instructions *********************************************************************** */
2456 #define BranchCheck0()\
2457 if( CPU.BranchSkip)\
2459 CPU.BranchSkip = FALSE;\
2460 if (!Settings.SoundSkipMethod)\
2461 if( CPU.PC - CPU.PCBase > OpAddress)\
2465 #define BranchCheck1()\
2466 if( CPU.BranchSkip)\
2468 CPU.BranchSkip = FALSE;\
2469 if (!Settings.SoundSkipMethod) {\
2470 if( CPU.PC - CPU.PCBase > OpAddress)\
2473 if (Settings.SoundSkipMethod == 1)\
2475 if (Settings.SoundSkipMethod == 3)\
2476 if( CPU.PC - CPU.PCBase > OpAddress)\
2479 CPU.PC = CPU.PCBase + OpAddress;\
2482 #define BranchCheck2()\
2483 if( CPU.BranchSkip)\
2485 CPU.BranchSkip = FALSE;\
2486 if (!Settings.SoundSkipMethod) {\
2487 if( CPU.PC - CPU.PCBase > OpAddress)\
2490 if (Settings.SoundSkipMethod == 1)\
2491 CPU.PC = CPU.PCBase + OpAddress;\
2492 if (Settings.SoundSkipMethod == 3)\
2493 if (CPU.PC - CPU.PCBase > OpAddress)\
2496 CPU.PC = CPU.PCBase + OpAddress;\
2499 #define BranchCheck0()
2500 #define BranchCheck1()
2501 #define BranchCheck2()
2506 INLINE void CPUShutdown()
2508 if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
2510 // Don't skip cycles with a pending NMI or IRQ - could cause delayed
2511 // interrupt. Interrupts are delayed for a few cycles alreadybut
2512 // the delay could allow the shutdown code to cycle skip again.
2513 // Was causing screen flashing on Top Gear 3000.
2515 if (CPU.WaitCounter == 0 &&
2516 !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
2518 CPU.WaitAddress = NULL;
2521 S9xSA1ExecuteDuringSleep ();
2527 if (CPU.WaitCounter >= 2)
2528 CPU.WaitCounter = 1;
2534 INLINE void CPUShutdown()
2536 if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
2538 if (CPU.WaitCounter >= 1)
2540 SA1.Executing = FALSE;
2541 SA1ICPU.CPUExecuting = FALSE;
2549 #define CPUShutdown()
2555 long OpAddress = Relative ();
2559 CPU.PC = CPU.PCBase + OpAddress;
2561 CPU.Cycles += ONE_CYCLE;
2574 long OpAddress = Relative ();
2578 CPU.PC = CPU.PCBase + OpAddress;
2580 CPU.Cycles += ONE_CYCLE;
2593 long OpAddress = Relative ();
2597 CPU.PC = CPU.PCBase + OpAddress;
2599 CPU.Cycles += ONE_CYCLE;
2612 long OpAddress = Relative ();
2614 if (CheckNegative())
2616 CPU.PC = CPU.PCBase + OpAddress;
2618 CPU.Cycles += ONE_CYCLE;
2631 long OpAddress = Relative ();
2635 CPU.PC = CPU.PCBase + OpAddress;
2638 CPU.Cycles += ONE_CYCLE;
2651 long OpAddress = Relative ();
2653 if (!CheckNegative())
2655 CPU.PC = CPU.PCBase + OpAddress;
2657 CPU.Cycles += ONE_CYCLE;
2670 long OpAddress = Relative ();
2671 CPU.PC = CPU.PCBase + OpAddress;
2673 CPU.Cycles += ONE_CYCLE;
2685 long OpAddress = Relative ();
2687 if (!CheckOverflow())
2689 CPU.PC = CPU.PCBase + OpAddress;
2691 CPU.Cycles += ONE_CYCLE;
2704 long OpAddress = Relative ();
2706 if (CheckOverflow())
2708 CPU.PC = CPU.PCBase + OpAddress;
2710 CPU.Cycles += ONE_CYCLE;
2719 /**********************************************************************************************/
2721 /* ClearFlag Instructions ******************************************************************** */
2727 CPU.Cycles += ONE_CYCLE;
2736 CPU.Cycles += ONE_CYCLE;
2745 CPU.Cycles += ONE_CYCLE;
2747 /* CHECK_FOR_IRQ(); */
2755 CPU.Cycles += ONE_CYCLE;
2758 /**********************************************************************************************/
2760 /* DEX/DEY *********************************************************************************** */
2761 static void OpCAX1 ()
2764 CPU.Cycles += ONE_CYCLE;
2767 CPU.WaitAddress = NULL;
2771 SETZN8 (Registers.XL);
2774 static void OpCAX0 ()
2777 CPU.Cycles += ONE_CYCLE;
2780 CPU.WaitAddress = NULL;
2784 SETZN16 (Registers.X.W);
2787 static void Op88X1 ()
2790 CPU.Cycles += ONE_CYCLE;
2793 CPU.WaitAddress = NULL;
2797 SETZN8 (Registers.YL);
2800 static void Op88X0 ()
2803 CPU.Cycles += ONE_CYCLE;
2806 CPU.WaitAddress = NULL;
2810 SETZN16 (Registers.Y.W);
2812 /**********************************************************************************************/
2814 /* INX/INY *********************************************************************************** */
2815 static void OpE8X1 ()
2818 CPU.Cycles += ONE_CYCLE;
2821 CPU.WaitAddress = NULL;
2825 SETZN8 (Registers.XL);
2828 static void OpE8X0 ()
2831 CPU.Cycles += ONE_CYCLE;
2834 CPU.WaitAddress = NULL;
2838 SETZN16 (Registers.X.W);
2841 static void OpC8X1 ()
2844 CPU.Cycles += ONE_CYCLE;
2847 CPU.WaitAddress = NULL;
2851 SETZN8 (Registers.YL);
2854 static void OpC8X0 ()
2857 CPU.Cycles += ONE_CYCLE;
2860 CPU.WaitAddress = NULL;
2864 SETZN16 (Registers.Y.W);
2867 /**********************************************************************************************/
2869 /* NOP *************************************************************************************** */
2873 CPU.Cycles += ONE_CYCLE;
2877 /**********************************************************************************************/
2879 /* PUSH Instructions ************************************************************************* */
2881 S9xSetWord (w, Registers.S.W - 1);\
2884 S9xSetByte (b, Registers.S.W--);
2888 long OpAddress = Absolute ();
2894 long OpAddress = DirectIndirect ();
2900 long OpAddress = RelativeLong ();
2904 static void Op48M1 ()
2906 PUSHB (Registers.AL);
2908 CPU.Cycles += ONE_CYCLE;
2912 static void Op48M0 ()
2914 PUSHW (Registers.A.W);
2916 CPU.Cycles += ONE_CYCLE;
2922 PUSHB (Registers.DB);
2924 CPU.Cycles += ONE_CYCLE;
2930 PUSHW (Registers.D.W);
2932 CPU.Cycles += ONE_CYCLE;
2938 PUSHB (Registers.PB);
2940 CPU.Cycles += ONE_CYCLE;
2947 PUSHB (Registers.PL);
2949 CPU.Cycles += ONE_CYCLE;
2953 static void OpDAX1 ()
2955 PUSHB (Registers.XL);
2957 CPU.Cycles += ONE_CYCLE;
2961 static void OpDAX0 ()
2963 PUSHW (Registers.X.W);
2965 CPU.Cycles += ONE_CYCLE;
2969 static void Op5AX1 ()
2971 PUSHB (Registers.YL);
2973 CPU.Cycles += ONE_CYCLE;
2977 static void Op5AX0 ()
2979 PUSHW (Registers.Y.W);
2981 CPU.Cycles += ONE_CYCLE;
2984 /**********************************************************************************************/
2986 /* PULL Instructions ************************************************************************* */
2988 w = S9xGetWord (Registers.S.W + 1); \
2992 b = S9xGetByte (++Registers.S.W);
2994 static void Op68M1 ()
2997 CPU.Cycles += TWO_CYCLES;
2999 PullB (Registers.AL);
3000 SETZN8 (Registers.AL);
3003 static void Op68M0 ()
3006 CPU.Cycles += TWO_CYCLES;
3008 PullW (Registers.A.W);
3009 SETZN16 (Registers.A.W);
3015 CPU.Cycles += TWO_CYCLES;
3017 PullB (Registers.DB);
3018 SETZN8 (Registers.DB);
3019 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3026 CPU.Cycles += TWO_CYCLES;
3028 PullW (Registers.D.W);
3029 SETZN16 (Registers.D.W);
3036 CPU.Cycles += TWO_CYCLES;
3038 PullB (Registers.PL);
3047 /* CHECK_FOR_IRQ();*/
3050 static void OpFAX1 ()
3053 CPU.Cycles += TWO_CYCLES;
3055 PullB (Registers.XL);
3056 SETZN8 (Registers.XL);
3059 static void OpFAX0 ()
3062 CPU.Cycles += TWO_CYCLES;
3064 PullW (Registers.X.W);
3065 SETZN16 (Registers.X.W);
3068 static void Op7AX1 ()
3071 CPU.Cycles += TWO_CYCLES;
3073 PullB (Registers.YL);
3074 SETZN8 (Registers.YL);
3077 static void Op7AX0 ()
3080 CPU.Cycles += TWO_CYCLES;
3082 PullW (Registers.Y.W);
3083 SETZN16 (Registers.Y.W);
3086 /**********************************************************************************************/
3088 /* SetFlag Instructions ********************************************************************** */
3094 CPU.Cycles += ONE_CYCLE;
3103 CPU.Cycles += ONE_CYCLE;
3105 missing.decimal_mode = 1;
3113 CPU.Cycles += ONE_CYCLE;
3116 /**********************************************************************************************/
3118 /* Transfer Instructions ********************************************************************* */
3120 static void OpAAX1 ()
3123 CPU.Cycles += ONE_CYCLE;
3125 Registers.XL = Registers.AL;
3126 SETZN8 (Registers.XL);
3130 static void OpAAX0 ()
3133 CPU.Cycles += ONE_CYCLE;
3135 Registers.X.W = Registers.A.W;
3136 SETZN16 (Registers.X.W);
3140 static void OpA8X1 ()
3143 CPU.Cycles += ONE_CYCLE;
3145 Registers.YL = Registers.AL;
3146 SETZN8 (Registers.YL);
3150 static void OpA8X0 ()
3153 CPU.Cycles += ONE_CYCLE;
3155 Registers.Y.W = Registers.A.W;
3156 SETZN16 (Registers.Y.W);
3162 CPU.Cycles += ONE_CYCLE;
3164 Registers.D.W = Registers.A.W;
3165 SETZN16 (Registers.D.W);
3171 CPU.Cycles += ONE_CYCLE;
3173 Registers.S.W = Registers.A.W;
3174 if (CheckEmulation())
3181 CPU.Cycles += ONE_CYCLE;
3183 Registers.A.W = Registers.D.W;
3184 SETZN16 (Registers.A.W);
3190 CPU.Cycles += ONE_CYCLE;
3192 Registers.A.W = Registers.S.W;
3193 SETZN16 (Registers.A.W);
3196 static void OpBAX1 ()
3199 CPU.Cycles += ONE_CYCLE;
3201 Registers.XL = Registers.SL;
3202 SETZN8 (Registers.XL);
3205 static void OpBAX0 ()
3208 CPU.Cycles += ONE_CYCLE;
3210 Registers.X.W = Registers.S.W;
3211 SETZN16 (Registers.X.W);
3214 static void Op8AM1 ()
3217 CPU.Cycles += ONE_CYCLE;
3219 Registers.AL = Registers.XL;
3220 SETZN8 (Registers.AL);
3223 static void Op8AM0 ()
3226 CPU.Cycles += ONE_CYCLE;
3228 Registers.A.W = Registers.X.W;
3229 SETZN16 (Registers.A.W);
3235 CPU.Cycles += ONE_CYCLE;
3237 Registers.S.W = Registers.X.W;
3238 if (CheckEmulation())
3242 static void Op9BX1 ()
3245 CPU.Cycles += ONE_CYCLE;
3247 Registers.YL = Registers.XL;
3248 SETZN8 (Registers.YL);
3251 static void Op9BX0 ()
3254 CPU.Cycles += ONE_CYCLE;
3256 Registers.Y.W = Registers.X.W;
3257 SETZN16 (Registers.Y.W);
3260 static void Op98M1 ()
3263 CPU.Cycles += ONE_CYCLE;
3265 Registers.AL = Registers.YL;
3266 SETZN8 (Registers.AL);
3269 static void Op98M0 ()
3272 CPU.Cycles += ONE_CYCLE;
3274 Registers.A.W = Registers.Y.W;
3275 SETZN16 (Registers.A.W);
3278 static void OpBBX1 ()
3281 CPU.Cycles += ONE_CYCLE;
3283 Registers.XL = Registers.YL;
3284 SETZN8 (Registers.XL);
3287 static void OpBBX0 ()
3290 CPU.Cycles += ONE_CYCLE;
3292 Registers.X.W = Registers.Y.W;
3293 SETZN16 (Registers.X.W);
3296 /**********************************************************************************************/
3298 /* XCE *************************************************************************************** */
3302 CPU.Cycles += ONE_CYCLE;
3305 uint8 A1 = (ICPU._Carry & 0xff);
3306 uint8 A2 = Registers.PH;
3307 ICPU._Carry = A2 & 1;
3310 if (CheckEmulation())
3312 SetFlags(MemoryFlag | IndexFlag);
3314 missing.emulate6502 = 1;
3323 /**********************************************************************************************/
3325 /* BRK *************************************************************************************** */
3329 if (CPU.Flags & TRACE_FLAG)
3330 S9xTraceMessage ("*** BRK");
3334 CPU.BRKTriggered = TRUE;
3337 if (!CheckEmulation())
3339 PUSHB (Registers.PB);
3340 PUSHW (CPU.PC - CPU.PCBase + 1);
3342 PUSHB (Registers.PL);
3348 S9xSetPCBase (S9xGetWord (0xFFE6));
3350 CPU.Cycles += TWO_CYCLES;
3359 PUSHW (CPU.PC - CPU.PCBase);
3361 PUSHB (Registers.PL);
3367 S9xSetPCBase (S9xGetWord (0xFFFE));
3369 CPU.Cycles += ONE_CYCLE;
3377 /**********************************************************************************************/
3379 /* BRL ************************************************************************************** */
3382 long OpAddress = RelativeLong ();
3383 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3385 /**********************************************************************************************/
3387 /* IRQ *************************************************************************************** */
3388 void S9xOpcode_IRQ ()
3391 if (CPU.Flags & TRACE_FLAG)
3392 S9xTraceMessage ("*** IRQ");
3394 if (!CheckEmulation())
3396 PUSHB (Registers.PB);
3397 PUSHW (CPU.PC - CPU.PCBase);
3399 PUSHB (Registers.PL);
3406 S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
3407 (Memory.FillRAM [0x2208] << 8));
3409 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
3410 S9xSetPCBase (Memory.FillRAM [0x220e] |
3411 (Memory.FillRAM [0x220f] << 8));
3413 S9xSetPCBase (S9xGetWord (0xFFEE));
3416 CPU.Cycles += TWO_CYCLES;
3425 PUSHW (CPU.PC - CPU.PCBase);
3427 PUSHB (Registers.PL);
3434 S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
3435 (Memory.FillRAM [0x2208] << 8));
3437 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
3438 S9xSetPCBase (Memory.FillRAM [0x220e] |
3439 (Memory.FillRAM [0x220f] << 8));
3441 S9xSetPCBase (S9xGetWord (0xFFFE));
3444 CPU.Cycles += ONE_CYCLE;
3453 /**********************************************************************************************/
3455 /* NMI *************************************************************************************** */
3456 void S9xOpcode_NMI ()
3459 if (CPU.Flags & TRACE_FLAG)
3460 S9xTraceMessage ("*** NMI");
3462 if (!CheckEmulation())
3464 PUSHB (Registers.PB);
3465 PUSHW (CPU.PC - CPU.PCBase);
3467 PUSHB (Registers.PL);
3474 S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
3475 (Memory.FillRAM [0x2206] << 8));
3477 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x20))
3478 S9xSetPCBase (Memory.FillRAM [0x220c] |
3479 (Memory.FillRAM [0x220d] << 8));
3481 S9xSetPCBase (S9xGetWord (0xFFEA));
3484 CPU.Cycles += TWO_CYCLES;
3493 PUSHW (CPU.PC - CPU.PCBase);
3495 PUSHB (Registers.PL);
3502 S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
3503 (Memory.FillRAM [0x2206] << 8));
3505 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x20))
3506 S9xSetPCBase (Memory.FillRAM [0x220c] |
3507 (Memory.FillRAM [0x220d] << 8));
3509 S9xSetPCBase (S9xGetWord (0xFFFA));
3512 CPU.Cycles += ONE_CYCLE;
3520 /**********************************************************************************************/
3522 /* COP *************************************************************************************** */
3526 if (CPU.Flags & TRACE_FLAG)
3527 S9xTraceMessage ("*** COP");
3529 if (!CheckEmulation())
3531 PUSHB (Registers.PB);
3532 PUSHW (CPU.PC - CPU.PCBase + 1);
3534 PUSHB (Registers.PL);
3540 S9xSetPCBase (S9xGetWord (0xFFE4));
3542 CPU.Cycles += TWO_CYCLES;
3551 PUSHW (CPU.PC - CPU.PCBase);
3553 PUSHB (Registers.PL);
3559 S9xSetPCBase (S9xGetWord (0xFFF4));
3561 CPU.Cycles += ONE_CYCLE;
3569 /**********************************************************************************************/
3571 /* JML *************************************************************************************** */
3574 long OpAddress = AbsoluteIndirectLong ();
3575 Registers.PB = (uint8) (OpAddress >> 16);
3576 ICPU.ShiftedPB = OpAddress & 0xff0000;
3577 S9xSetPCBase (OpAddress);
3579 CPU.Cycles += TWO_CYCLES;
3585 long OpAddress = AbsoluteLong ();
3586 Registers.PB = (uint8) (OpAddress >> 16);
3587 ICPU.ShiftedPB = OpAddress & 0xff0000;
3588 S9xSetPCBase (OpAddress);
3590 /**********************************************************************************************/
3592 /* JMP *************************************************************************************** */
3595 long OpAddress = Absolute ();
3596 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3597 #if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES)
3604 long OpAddress = AbsoluteIndirect ();
3605 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3610 long OpAddress = AbsoluteIndexedIndirect ();
3611 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3613 CPU.Cycles += ONE_CYCLE;
3616 /**********************************************************************************************/
3618 /* JSL/RTL *********************************************************************************** */
3621 long OpAddress = AbsoluteLong ();
3622 PUSHB (Registers.PB);
3623 PUSHW (CPU.PC - CPU.PCBase - 1);
3624 Registers.PB = (uint8) (OpAddress >> 16);
3625 ICPU.ShiftedPB = OpAddress & 0xff0000;
3626 S9xSetPCBase (OpAddress);
3631 PullW (Registers.PC);
3632 PullB (Registers.PB);
3633 ICPU.ShiftedPB = (Registers.PB & 0xff) << 16;
3634 S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
3636 CPU.Cycles += TWO_CYCLES;
3639 /**********************************************************************************************/
3641 /* JSR/RTS *********************************************************************************** */
3644 long OpAddress = Absolute ();
3645 PUSHW (CPU.PC - CPU.PCBase - 1);
3646 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3648 CPU.Cycles += ONE_CYCLE;
3654 long OpAddress = AbsoluteIndexedIndirect ();
3655 PUSHW (CPU.PC - CPU.PCBase - 1);
3656 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3658 CPU.Cycles += ONE_CYCLE;
3664 PullW (Registers.PC);
3665 S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
3667 CPU.Cycles += ONE_CYCLE * 3;
3671 /**********************************************************************************************/
3673 /* MVN/MVP *********************************************************************************** */
3674 static void Op54X1 ()
3679 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3682 Registers.DB = *CPU.PC++;
3683 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3684 SrcBank = *CPU.PC++;
3686 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3687 ICPU.ShiftedDB + Registers.Y.W);
3692 if (Registers.A.W != 0xffff)
3696 static void Op54X0 ()
3701 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3704 Registers.DB = *CPU.PC++;
3705 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3706 SrcBank = *CPU.PC++;
3708 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3709 ICPU.ShiftedDB + Registers.Y.W);
3714 if (Registers.A.W != 0xffff)
3718 static void Op44X1 ()
3723 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3725 Registers.DB = *CPU.PC++;
3726 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3727 SrcBank = *CPU.PC++;
3728 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3729 ICPU.ShiftedDB + Registers.Y.W);
3734 if (Registers.A.W != 0xffff)
3738 static void Op44X0 ()
3743 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3745 Registers.DB = *CPU.PC++;
3746 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3747 SrcBank = *CPU.PC++;
3748 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3749 ICPU.ShiftedDB + Registers.Y.W);
3754 if (Registers.A.W != 0xffff)
3758 /**********************************************************************************************/
3760 /* REP/SEP *********************************************************************************** */
3763 uint8 Work8 = ~*CPU.PC++;
3764 Registers.PL &= Work8;
3765 ICPU._Carry &= Work8;
3766 ICPU._Overflow &= (Work8 >> 6);
3767 ICPU._Negative &= Work8;
3768 ICPU._Zero |= ~Work8 & Zero;
3771 CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
3773 if (CheckEmulation())
3775 SetFlags(MemoryFlag | IndexFlag);
3776 missing.emulate6502 = 1;
3784 /* CHECK_FOR_IRQ(); */
3789 uint8 Work8 = *CPU.PC++;
3790 Registers.PL |= Work8;
3791 ICPU._Carry |= Work8 & 1;
3792 ICPU._Overflow |= (Work8 >> 6) & 1;
3793 ICPU._Negative |= Work8;
3797 CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
3799 if (CheckEmulation())
3801 SetFlags(MemoryFlag | IndexFlag);
3802 missing.emulate6502 = 1;
3811 /**********************************************************************************************/
3813 /* XBA *************************************************************************************** */
3816 uint8 Work8 = Registers.AL;
3817 Registers.AL = Registers.AH;
3818 Registers.AH = Work8;
3820 SETZN8 (Registers.AL);
3822 CPU.Cycles += TWO_CYCLES;
3825 /**********************************************************************************************/
3827 /* RTI *************************************************************************************** */
3830 PullB (Registers.PL);
3832 PullW (Registers.PC);
3833 if (!CheckEmulation())
3835 PullB (Registers.PB);
3836 ICPU.ShiftedPB = (Registers.PB & 0xff) << 16;
3840 SetFlags (MemoryFlag | IndexFlag);
3841 missing.emulate6502 = 1;
3843 S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
3851 CPU.Cycles += TWO_CYCLES;
3854 /* CHECK_FOR_IRQ(); */
3857 /**********************************************************************************************/
3859 /* STP/WAI/DB ******************************************************************************** */
3866 CPU.Cycles += TWO_CYCLES;
3875 CPU.WaitingForInterrupt = TRUE;
3879 if (Settings.Shutdown)
3884 if (Settings.Shutdown)
3886 SA1ICPU.CPUExecuting = FALSE;
3887 SA1.Executing = FALSE;
3898 CPU.Flags |= DEBUG_MODE_FLAG;
3901 // Reserved S9xOpcode
3904 // TODO: Implement (speedhacks in i386)
3907 /**********************************************************************************************/
3909 /**********************************************************************************************/
3910 /* CPU-S9xOpcodes Definitions */
3911 /**********************************************************************************************/
3912 struct SOpcodes S9xOpcodesM1X1[256] =
3914 {Op00}, {Op01M1}, {Op02}, {Op03M1}, {Op04M1},
3915 {Op05M1}, {Op06M1}, {Op07M1}, {Op08}, {Op09M1},
3916 {Op0AM1}, {Op0B}, {Op0CM1}, {Op0DM1}, {Op0EM1},
3917 {Op0FM1}, {Op10}, {Op11M1}, {Op12M1}, {Op13M1},
3918 {Op14M1}, {Op15M1}, {Op16M1}, {Op17M1}, {Op18},
3919 {Op19M1}, {Op1AM1}, {Op1B}, {Op1CM1}, {Op1DM1},
3920 {Op1EM1}, {Op1FM1}, {Op20}, {Op21M1}, {Op22},
3921 {Op23M1}, {Op24M1}, {Op25M1}, {Op26M1}, {Op27M1},
3922 {Op28}, {Op29M1}, {Op2AM1}, {Op2B}, {Op2CM1},
3923 {Op2DM1}, {Op2EM1}, {Op2FM1}, {Op30}, {Op31M1},
3924 {Op32M1}, {Op33M1}, {Op34M1}, {Op35M1}, {Op36M1},
3925 {Op37M1}, {Op38}, {Op39M1}, {Op3AM1}, {Op3B},
3926 {Op3CM1}, {Op3DM1}, {Op3EM1}, {Op3FM1}, {Op40},
3927 {Op41M1}, {Op42}, {Op43M1}, {Op44X1}, {Op45M1},
3928 {Op46M1}, {Op47M1}, {Op48M1}, {Op49M1}, {Op4AM1},
3929 {Op4B}, {Op4C}, {Op4DM1}, {Op4EM1}, {Op4FM1},
3930 {Op50}, {Op51M1}, {Op52M1}, {Op53M1}, {Op54X1},
3931 {Op55M1}, {Op56M1}, {Op57M1}, {Op58}, {Op59M1},
3932 {Op5AX1}, {Op5B}, {Op5C}, {Op5DM1}, {Op5EM1},
3933 {Op5FM1}, {Op60}, {Op61M1}, {Op62}, {Op63M1},
3934 {Op64M1}, {Op65M1}, {Op66M1}, {Op67M1}, {Op68M1},
3935 {Op69M1}, {Op6AM1}, {Op6B}, {Op6C}, {Op6DM1},
3936 {Op6EM1}, {Op6FM1}, {Op70}, {Op71M1}, {Op72M1},
3937 {Op73M1}, {Op74M1}, {Op75M1}, {Op76M1}, {Op77M1},
3938 {Op78}, {Op79M1}, {Op7AX1}, {Op7B}, {Op7C},
3939 {Op7DM1}, {Op7EM1}, {Op7FM1}, {Op80}, {Op81M1},
3940 {Op82}, {Op83M1}, {Op84X1}, {Op85M1}, {Op86X1},
3941 {Op87M1}, {Op88X1}, {Op89M1}, {Op8AM1}, {Op8B},
3942 {Op8CX1}, {Op8DM1}, {Op8EX1}, {Op8FM1}, {Op90},
3943 {Op91M1}, {Op92M1}, {Op93M1}, {Op94X1}, {Op95M1},
3944 {Op96X1}, {Op97M1}, {Op98M1}, {Op99M1}, {Op9A},
3945 {Op9BX1}, {Op9CM1}, {Op9DM1}, {Op9EM1}, {Op9FM1},
3946 {OpA0X1}, {OpA1M1}, {OpA2X1}, {OpA3M1}, {OpA4X1},
3947 {OpA5M1}, {OpA6X1}, {OpA7M1}, {OpA8X1}, {OpA9M1},
3948 {OpAAX1}, {OpAB}, {OpACX1}, {OpADM1}, {OpAEX1},
3949 {OpAFM1}, {OpB0}, {OpB1M1}, {OpB2M1}, {OpB3M1},
3950 {OpB4X1}, {OpB5M1}, {OpB6X1}, {OpB7M1}, {OpB8},
3951 {OpB9M1}, {OpBAX1}, {OpBBX1}, {OpBCX1}, {OpBDM1},
3952 {OpBEX1}, {OpBFM1}, {OpC0X1}, {OpC1M1}, {OpC2},
3953 {OpC3M1}, {OpC4X1}, {OpC5M1}, {OpC6M1}, {OpC7M1},
3954 {OpC8X1}, {OpC9M1}, {OpCAX1}, {OpCB}, {OpCCX1},
3955 {OpCDM1}, {OpCEM1}, {OpCFM1}, {OpD0}, {OpD1M1},
3956 {OpD2M1}, {OpD3M1}, {OpD4}, {OpD5M1}, {OpD6M1},
3957 {OpD7M1}, {OpD8}, {OpD9M1}, {OpDAX1}, {OpDB},
3958 {OpDC}, {OpDDM1}, {OpDEM1}, {OpDFM1}, {OpE0X1},
3959 {OpE1M1}, {OpE2}, {OpE3M1}, {OpE4X1}, {OpE5M1},
3960 {OpE6M1}, {OpE7M1}, {OpE8X1}, {OpE9M1}, {OpEA},
3961 {OpEB}, {OpECX1}, {OpEDM1}, {OpEEM1}, {OpEFM1},
3962 {OpF0}, {OpF1M1}, {OpF2M1}, {OpF3M1}, {OpF4},
3963 {OpF5M1}, {OpF6M1}, {OpF7M1}, {OpF8}, {OpF9M1},
3964 {OpFAX1}, {OpFB}, {OpFC}, {OpFDM1}, {OpFEM1},
3968 struct SOpcodes S9xOpcodesM1X0[256] =
3970 {Op00}, {Op01M1}, {Op02}, {Op03M1}, {Op04M1},
3971 {Op05M1}, {Op06M1}, {Op07M1}, {Op08}, {Op09M1},
3972 {Op0AM1}, {Op0B}, {Op0CM1}, {Op0DM1}, {Op0EM1},
3973 {Op0FM1}, {Op10}, {Op11M1}, {Op12M1}, {Op13M1},
3974 {Op14M1}, {Op15M1}, {Op16M1}, {Op17M1}, {Op18},
3975 {Op19M1}, {Op1AM1}, {Op1B}, {Op1CM1}, {Op1DM1},
3976 {Op1EM1}, {Op1FM1}, {Op20}, {Op21M1}, {Op22},
3977 {Op23M1}, {Op24M1}, {Op25M1}, {Op26M1}, {Op27M1},
3978 {Op28}, {Op29M1}, {Op2AM1}, {Op2B}, {Op2CM1},
3979 {Op2DM1}, {Op2EM1}, {Op2FM1}, {Op30}, {Op31M1},
3980 {Op32M1}, {Op33M1}, {Op34M1}, {Op35M1}, {Op36M1},
3981 {Op37M1}, {Op38}, {Op39M1}, {Op3AM1}, {Op3B},
3982 {Op3CM1}, {Op3DM1}, {Op3EM1}, {Op3FM1}, {Op40},
3983 {Op41M1}, {Op42}, {Op43M1}, {Op44X0}, {Op45M1},
3984 {Op46M1}, {Op47M1}, {Op48M1}, {Op49M1}, {Op4AM1},
3985 {Op4B}, {Op4C}, {Op4DM1}, {Op4EM1}, {Op4FM1},
3986 {Op50}, {Op51M1}, {Op52M1}, {Op53M1}, {Op54X0},
3987 {Op55M1}, {Op56M1}, {Op57M1}, {Op58}, {Op59M1},
3988 {Op5AX0}, {Op5B}, {Op5C}, {Op5DM1}, {Op5EM1},
3989 {Op5FM1}, {Op60}, {Op61M1}, {Op62}, {Op63M1},
3990 {Op64M1}, {Op65M1}, {Op66M1}, {Op67M1}, {Op68M1},
3991 {Op69M1}, {Op6AM1}, {Op6B}, {Op6C}, {Op6DM1},
3992 {Op6EM1}, {Op6FM1}, {Op70}, {Op71M1}, {Op72M1},
3993 {Op73M1}, {Op74M1}, {Op75M1}, {Op76M1}, {Op77M1},
3994 {Op78}, {Op79M1}, {Op7AX0}, {Op7B}, {Op7C},
3995 {Op7DM1}, {Op7EM1}, {Op7FM1}, {Op80}, {Op81M1},
3996 {Op82}, {Op83M1}, {Op84X0}, {Op85M1}, {Op86X0},
3997 {Op87M1}, {Op88X0}, {Op89M1}, {Op8AM1}, {Op8B},
3998 {Op8CX0}, {Op8DM1}, {Op8EX0}, {Op8FM1}, {Op90},
3999 {Op91M1}, {Op92M1}, {Op93M1}, {Op94X0}, {Op95M1},
4000 {Op96X0}, {Op97M1}, {Op98M1}, {Op99M1}, {Op9A},
4001 {Op9BX0}, {Op9CM1}, {Op9DM1}, {Op9EM1}, {Op9FM1},
4002 {OpA0X0}, {OpA1M1}, {OpA2X0}, {OpA3M1}, {OpA4X0},
4003 {OpA5M1}, {OpA6X0}, {OpA7M1}, {OpA8X0}, {OpA9M1},
4004 {OpAAX0}, {OpAB}, {OpACX0}, {OpADM1}, {OpAEX0},
4005 {OpAFM1}, {OpB0}, {OpB1M1}, {OpB2M1}, {OpB3M1},
4006 {OpB4X0}, {OpB5M1}, {OpB6X0}, {OpB7M1}, {OpB8},
4007 {OpB9M1}, {OpBAX0}, {OpBBX0}, {OpBCX0}, {OpBDM1},
4008 {OpBEX0}, {OpBFM1}, {OpC0X0}, {OpC1M1}, {OpC2},
4009 {OpC3M1}, {OpC4X0}, {OpC5M1}, {OpC6M1}, {OpC7M1},
4010 {OpC8X0}, {OpC9M1}, {OpCAX0}, {OpCB}, {OpCCX0},
4011 {OpCDM1}, {OpCEM1}, {OpCFM1}, {OpD0}, {OpD1M1},
4012 {OpD2M1}, {OpD3M1}, {OpD4}, {OpD5M1}, {OpD6M1},
4013 {OpD7M1}, {OpD8}, {OpD9M1}, {OpDAX0}, {OpDB},
4014 {OpDC}, {OpDDM1}, {OpDEM1}, {OpDFM1}, {OpE0X0},
4015 {OpE1M1}, {OpE2}, {OpE3M1}, {OpE4X0}, {OpE5M1},
4016 {OpE6M1}, {OpE7M1}, {OpE8X0}, {OpE9M1}, {OpEA},
4017 {OpEB}, {OpECX0}, {OpEDM1}, {OpEEM1}, {OpEFM1},
4018 {OpF0}, {OpF1M1}, {OpF2M1}, {OpF3M1}, {OpF4},
4019 {OpF5M1}, {OpF6M1}, {OpF7M1}, {OpF8}, {OpF9M1},
4020 {OpFAX0}, {OpFB}, {OpFC}, {OpFDM1}, {OpFEM1},
4024 struct SOpcodes S9xOpcodesM0X0[256] =
4026 {Op00}, {Op01M0}, {Op02}, {Op03M0}, {Op04M0},
4027 {Op05M0}, {Op06M0}, {Op07M0}, {Op08}, {Op09M0},
4028 {Op0AM0}, {Op0B}, {Op0CM0}, {Op0DM0}, {Op0EM0},
4029 {Op0FM0}, {Op10}, {Op11M0}, {Op12M0}, {Op13M0},
4030 {Op14M0}, {Op15M0}, {Op16M0}, {Op17M0}, {Op18},
4031 {Op19M0}, {Op1AM0}, {Op1B}, {Op1CM0}, {Op1DM0},
4032 {Op1EM0}, {Op1FM0}, {Op20}, {Op21M0}, {Op22},
4033 {Op23M0}, {Op24M0}, {Op25M0}, {Op26M0}, {Op27M0},
4034 {Op28}, {Op29M0}, {Op2AM0}, {Op2B}, {Op2CM0},
4035 {Op2DM0}, {Op2EM0}, {Op2FM0}, {Op30}, {Op31M0},
4036 {Op32M0}, {Op33M0}, {Op34M0}, {Op35M0}, {Op36M0},
4037 {Op37M0}, {Op38}, {Op39M0}, {Op3AM0}, {Op3B},
4038 {Op3CM0}, {Op3DM0}, {Op3EM0}, {Op3FM0}, {Op40},
4039 {Op41M0}, {Op42}, {Op43M0}, {Op44X0}, {Op45M0},
4040 {Op46M0}, {Op47M0}, {Op48M0}, {Op49M0}, {Op4AM0},
4041 {Op4B}, {Op4C}, {Op4DM0}, {Op4EM0}, {Op4FM0},
4042 {Op50}, {Op51M0}, {Op52M0}, {Op53M0}, {Op54X0},
4043 {Op55M0}, {Op56M0}, {Op57M0}, {Op58}, {Op59M0},
4044 {Op5AX0}, {Op5B}, {Op5C}, {Op5DM0}, {Op5EM0},
4045 {Op5FM0}, {Op60}, {Op61M0}, {Op62}, {Op63M0},
4046 {Op64M0}, {Op65M0}, {Op66M0}, {Op67M0}, {Op68M0},
4047 {Op69M0}, {Op6AM0}, {Op6B}, {Op6C}, {Op6DM0},
4048 {Op6EM0}, {Op6FM0}, {Op70}, {Op71M0}, {Op72M0},
4049 {Op73M0}, {Op74M0}, {Op75M0}, {Op76M0}, {Op77M0},
4050 {Op78}, {Op79M0}, {Op7AX0}, {Op7B}, {Op7C},
4051 {Op7DM0}, {Op7EM0}, {Op7FM0}, {Op80}, {Op81M0},
4052 {Op82}, {Op83M0}, {Op84X0}, {Op85M0}, {Op86X0},
4053 {Op87M0}, {Op88X0}, {Op89M0}, {Op8AM0}, {Op8B},
4054 {Op8CX0}, {Op8DM0}, {Op8EX0}, {Op8FM0}, {Op90},
4055 {Op91M0}, {Op92M0}, {Op93M0}, {Op94X0}, {Op95M0},
4056 {Op96X0}, {Op97M0}, {Op98M0}, {Op99M0}, {Op9A},
4057 {Op9BX0}, {Op9CM0}, {Op9DM0}, {Op9EM0}, {Op9FM0},
4058 {OpA0X0}, {OpA1M0}, {OpA2X0}, {OpA3M0}, {OpA4X0},
4059 {OpA5M0}, {OpA6X0}, {OpA7M0}, {OpA8X0}, {OpA9M0},
4060 {OpAAX0}, {OpAB}, {OpACX0}, {OpADM0}, {OpAEX0},
4061 {OpAFM0}, {OpB0}, {OpB1M0}, {OpB2M0}, {OpB3M0},
4062 {OpB4X0}, {OpB5M0}, {OpB6X0}, {OpB7M0}, {OpB8},
4063 {OpB9M0}, {OpBAX0}, {OpBBX0}, {OpBCX0}, {OpBDM0},
4064 {OpBEX0}, {OpBFM0}, {OpC0X0}, {OpC1M0}, {OpC2},
4065 {OpC3M0}, {OpC4X0}, {OpC5M0}, {OpC6M0}, {OpC7M0},
4066 {OpC8X0}, {OpC9M0}, {OpCAX0}, {OpCB}, {OpCCX0},
4067 {OpCDM0}, {OpCEM0}, {OpCFM0}, {OpD0}, {OpD1M0},
4068 {OpD2M0}, {OpD3M0}, {OpD4}, {OpD5M0}, {OpD6M0},
4069 {OpD7M0}, {OpD8}, {OpD9M0}, {OpDAX0}, {OpDB},
4070 {OpDC}, {OpDDM0}, {OpDEM0}, {OpDFM0}, {OpE0X0},
4071 {OpE1M0}, {OpE2}, {OpE3M0}, {OpE4X0}, {OpE5M0},
4072 {OpE6M0}, {OpE7M0}, {OpE8X0}, {OpE9M0}, {OpEA},
4073 {OpEB}, {OpECX0}, {OpEDM0}, {OpEEM0}, {OpEFM0},
4074 {OpF0}, {OpF1M0}, {OpF2M0}, {OpF3M0}, {OpF4},
4075 {OpF5M0}, {OpF6M0}, {OpF7M0}, {OpF8}, {OpF9M0},
4076 {OpFAX0}, {OpFB}, {OpFC}, {OpFDM0}, {OpFEM0},
4080 struct SOpcodes S9xOpcodesM0X1[256] =
4082 {Op00}, {Op01M0}, {Op02}, {Op03M0}, {Op04M0},
4083 {Op05M0}, {Op06M0}, {Op07M0}, {Op08}, {Op09M0},
4084 {Op0AM0}, {Op0B}, {Op0CM0}, {Op0DM0}, {Op0EM0},
4085 {Op0FM0}, {Op10}, {Op11M0}, {Op12M0}, {Op13M0},
4086 {Op14M0}, {Op15M0}, {Op16M0}, {Op17M0}, {Op18},
4087 {Op19M0}, {Op1AM0}, {Op1B}, {Op1CM0}, {Op1DM0},
4088 {Op1EM0}, {Op1FM0}, {Op20}, {Op21M0}, {Op22},
4089 {Op23M0}, {Op24M0}, {Op25M0}, {Op26M0}, {Op27M0},
4090 {Op28}, {Op29M0}, {Op2AM0}, {Op2B}, {Op2CM0},
4091 {Op2DM0}, {Op2EM0}, {Op2FM0}, {Op30}, {Op31M0},
4092 {Op32M0}, {Op33M0}, {Op34M0}, {Op35M0}, {Op36M0},
4093 {Op37M0}, {Op38}, {Op39M0}, {Op3AM0}, {Op3B},
4094 {Op3CM0}, {Op3DM0}, {Op3EM0}, {Op3FM0}, {Op40},
4095 {Op41M0}, {Op42}, {Op43M0}, {Op44X1}, {Op45M0},
4096 {Op46M0}, {Op47M0}, {Op48M0}, {Op49M0}, {Op4AM0},
4097 {Op4B}, {Op4C}, {Op4DM0}, {Op4EM0}, {Op4FM0},
4098 {Op50}, {Op51M0}, {Op52M0}, {Op53M0}, {Op54X1},
4099 {Op55M0}, {Op56M0}, {Op57M0}, {Op58}, {Op59M0},
4100 {Op5AX1}, {Op5B}, {Op5C}, {Op5DM0}, {Op5EM0},
4101 {Op5FM0}, {Op60}, {Op61M0}, {Op62}, {Op63M0},
4102 {Op64M0}, {Op65M0}, {Op66M0}, {Op67M0}, {Op68M0},
4103 {Op69M0}, {Op6AM0}, {Op6B}, {Op6C}, {Op6DM0},
4104 {Op6EM0}, {Op6FM0}, {Op70}, {Op71M0}, {Op72M0},
4105 {Op73M0}, {Op74M0}, {Op75M0}, {Op76M0}, {Op77M0},
4106 {Op78}, {Op79M0}, {Op7AX1}, {Op7B}, {Op7C},
4107 {Op7DM0}, {Op7EM0}, {Op7FM0}, {Op80}, {Op81M0},
4108 {Op82}, {Op83M0}, {Op84X1}, {Op85M0}, {Op86X1},
4109 {Op87M0}, {Op88X1}, {Op89M0}, {Op8AM0}, {Op8B},
4110 {Op8CX1}, {Op8DM0}, {Op8EX1}, {Op8FM0}, {Op90},
4111 {Op91M0}, {Op92M0}, {Op93M0}, {Op94X1}, {Op95M0},
4112 {Op96X1}, {Op97M0}, {Op98M0}, {Op99M0}, {Op9A},
4113 {Op9BX1}, {Op9CM0}, {Op9DM0}, {Op9EM0}, {Op9FM0},
4114 {OpA0X1}, {OpA1M0}, {OpA2X1}, {OpA3M0}, {OpA4X1},
4115 {OpA5M0}, {OpA6X1}, {OpA7M0}, {OpA8X1}, {OpA9M0},
4116 {OpAAX1}, {OpAB}, {OpACX1}, {OpADM0}, {OpAEX1},
4117 {OpAFM0}, {OpB0}, {OpB1M0}, {OpB2M0}, {OpB3M0},
4118 {OpB4X1}, {OpB5M0}, {OpB6X1}, {OpB7M0}, {OpB8},
4119 {OpB9M0}, {OpBAX1}, {OpBBX1}, {OpBCX1}, {OpBDM0},
4120 {OpBEX1}, {OpBFM0}, {OpC0X1}, {OpC1M0}, {OpC2},
4121 {OpC3M0}, {OpC4X1}, {OpC5M0}, {OpC6M0}, {OpC7M0},
4122 {OpC8X1}, {OpC9M0}, {OpCAX1}, {OpCB}, {OpCCX1},
4123 {OpCDM0}, {OpCEM0}, {OpCFM0}, {OpD0}, {OpD1M0},
4124 {OpD2M0}, {OpD3M0}, {OpD4}, {OpD5M0}, {OpD6M0},
4125 {OpD7M0}, {OpD8}, {OpD9M0}, {OpDAX1}, {OpDB},
4126 {OpDC}, {OpDDM0}, {OpDEM0}, {OpDFM0}, {OpE0X1},
4127 {OpE1M0}, {OpE2}, {OpE3M0}, {OpE4X1}, {OpE5M0},
4128 {OpE6M0}, {OpE7M0}, {OpE8X1}, {OpE9M0}, {OpEA},
4129 {OpEB}, {OpECX1}, {OpEDM0}, {OpEEM0}, {OpEFM0},
4130 {OpF0}, {OpF1M0}, {OpF2M0}, {OpF3M0}, {OpF4},
4131 {OpF5M0}, {OpF6M0}, {OpF7M0}, {OpF8}, {OpF9M0},
4132 {OpFAX1}, {OpFB}, {OpFC}, {OpFDM0}, {OpFEM0},