2 * MUSB OTG driver debug support
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <linux/kernel.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/uaccess.h> /* FIXME remove procfs writes */
39 #include <mach/hardware.h>
40 #include <asm/mach-types.h>
42 #include "musb_core.h"
46 extern unsigned musb_debug;
48 #ifdef CONFIG_USB_MUSB_HDRC_HCD
50 static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
54 struct usb_host_endpoint *hep = qh->hep;
57 count = snprintf(buf, max, " qh %p dev%d ep%d%s max%d\n",
58 qh, qh->dev->devnum, qh->epnum,
59 ({ char *s; switch (qh->type) {
60 case USB_ENDPOINT_XFER_BULK:
62 case USB_ENDPOINT_XFER_INT:
64 case USB_ENDPOINT_XFER_CONTROL:
75 list_for_each_entry(urb, &hep->urb_list, urb_list) {
76 tmp = snprintf(buf, max, "\t%s urb %p %d/%d\n",
77 usb_pipein(urb->pipe) ? "in" : "out",
78 urb, urb->actual_length,
79 urb->transfer_buffer_length);
82 tmp = min(tmp, (int)max);
91 dump_queue(struct list_head *q, char *buf, unsigned max)
96 list_for_each_entry(qh, q, ring) {
99 tmp = dump_qh(qh, buf, max);
102 tmp = min(tmp, (int)max);
112 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
113 static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
117 void __iomem *regs = ep->hw_ep->regs;
121 if (ep->hw_ep->tx_double_buffered)
124 if (ep->hw_ep->rx_double_buffered)
129 struct usb_request *req;
131 code = snprintf(buf, max,
132 "\n%s (hw%d): %s%s, csr %04x maxp %04x\n",
133 ep->name, ep->current_epnum,
134 mode, ep->dma ? " dma" : "",
136 (ep->is_in || !ep->current_epnum)
139 musb_readw(regs, ep->is_in
145 code = min(code, (int) max);
149 if (cppi_ti_dma() && ep->current_epnum) {
150 unsigned cppi = ep->current_epnum - 1;
151 void __iomem *base = ep->musb->ctrl_base;
152 unsigned off1 = cppi << 2;
153 void __iomem *ram = base;
157 ram += DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
160 ram += DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
161 snprintf(tmp, sizeof tmp, "%d left, ",
163 DAVINCI_RXCPPI_BUFCNT0_REG + off1));
166 code = snprintf(buf, max, "%cX DMA%d: %s"
167 "%08x %08x, %08x %08x; "
168 "%08x %08x %08x .. %08x\n",
169 ep->is_in ? 'T' : 'R',
170 ep->current_epnum - 1, tmp,
171 musb_readl(ram, 0 * 4),
172 musb_readl(ram, 1 * 4),
173 musb_readl(ram, 2 * 4),
174 musb_readl(ram, 3 * 4),
175 musb_readl(ram, 4 * 4),
176 musb_readl(ram, 5 * 4),
177 musb_readl(ram, 6 * 4),
178 musb_readl(ram, 7 * 4));
181 code = min(code, (int) max);
186 if (list_empty(&ep->req_list)) {
187 code = snprintf(buf, max, "\t(queue empty)\n");
190 code = min(code, (int) max);
195 list_for_each_entry(req, &ep->req_list, list) {
196 code = snprintf(buf, max, "\treq %p, %s%s%d/%d\n",
198 req->zero ? "zero, " : "",
199 req->short_not_ok ? "!short, " : "",
200 req->actual, req->length);
203 code = min(code, (int) max);
213 dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
217 struct musb_hw_ep *hw_ep = &musb->endpoints[epnum];
220 musb_ep_select(musb->mregs, epnum);
221 #ifdef CONFIG_USB_MUSB_HDRC_HCD
222 if (is_host_active(musb)) {
223 int dump_rx, dump_tx;
224 void __iomem *regs = hw_ep->regs;
226 /* TEMPORARY (!) until we have a real periodic
230 /* control is shared, uses RX queue
231 * but (mostly) shadowed tx registers
233 dump_tx = !list_empty(&hw_ep->in_list);
235 } else if (hw_ep == musb->bulk_ep) {
236 dump_tx = !list_empty(&hw_ep->out_list);
237 dump_rx = !list_empty(&hw_ep->in_list);
244 code = snprintf(buf, max,
245 "\nRX%d: %s rxcsr %04x interval %02x "
246 "max %04x type %02x; "
247 "dev %d hub %d port %d"
250 hw_ep->rx_double_buffered
252 musb_readw(regs, MUSB_RXCSR),
253 musb_readb(regs, MUSB_RXINTERVAL),
254 musb_readw(regs, MUSB_RXMAXP),
255 musb_readb(regs, MUSB_RXTYPE),
256 /* FIXME: assumes multipoint */
257 musb_readb(musb->mregs,
258 MUSB_BUSCTL_OFFSET(epnum,
260 musb_readb(musb->mregs,
261 MUSB_BUSCTL_OFFSET(epnum,
263 musb_readb(musb->mregs,
264 MUSB_BUSCTL_OFFSET(epnum,
269 code = min(code, (int) max);
275 && hw_ep->rx_channel) {
276 unsigned cppi = epnum - 1;
277 unsigned off1 = cppi << 2;
282 base = musb->ctrl_base;
283 ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
285 snprintf(tmp, sizeof tmp, "%d left, ",
287 DAVINCI_RXCPPI_BUFCNT0_REG
290 code = snprintf(buf, max,
292 "%08x %08x, %08x %08x; "
293 "%08x %08x %08x .. %08x\n",
295 musb_readl(ram, 0 * 4),
296 musb_readl(ram, 1 * 4),
297 musb_readl(ram, 2 * 4),
298 musb_readl(ram, 3 * 4),
299 musb_readl(ram, 4 * 4),
300 musb_readl(ram, 5 * 4),
301 musb_readl(ram, 6 * 4),
302 musb_readl(ram, 7 * 4));
305 code = min(code, (int) max);
310 if (hw_ep == musb->bulk_ep
313 code = dump_queue(&hw_ep->in_list,
317 code = min(code, (int) max);
324 code = snprintf(buf, max,
325 "\nTX%d: %s txcsr %04x interval %02x "
326 "max %04x type %02x; "
327 "dev %d hub %d port %d"
330 hw_ep->tx_double_buffered
332 musb_readw(regs, MUSB_TXCSR),
333 musb_readb(regs, MUSB_TXINTERVAL),
334 musb_readw(regs, MUSB_TXMAXP),
335 musb_readb(regs, MUSB_TXTYPE),
336 /* FIXME: assumes multipoint */
337 musb_readb(musb->mregs,
338 MUSB_BUSCTL_OFFSET(epnum,
340 musb_readb(musb->mregs,
341 MUSB_BUSCTL_OFFSET(epnum,
343 musb_readb(musb->mregs,
344 MUSB_BUSCTL_OFFSET(epnum,
349 code = min(code, (int) max);
355 && hw_ep->tx_channel) {
356 unsigned cppi = epnum - 1;
360 base = musb->ctrl_base;
361 ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
363 code = snprintf(buf, max,
365 "%08x %08x, %08x %08x; "
366 "%08x %08x %08x .. %08x\n",
368 musb_readl(ram, 0 * 4),
369 musb_readl(ram, 1 * 4),
370 musb_readl(ram, 2 * 4),
371 musb_readl(ram, 3 * 4),
372 musb_readl(ram, 4 * 4),
373 musb_readl(ram, 5 * 4),
374 musb_readl(ram, 6 * 4),
375 musb_readl(ram, 7 * 4));
378 code = min(code, (int) max);
383 if (hw_ep == musb->control_ep
386 code = dump_queue(&hw_ep->in_list,
390 code = min(code, (int) max);
393 } else if (hw_ep == musb->bulk_ep
396 code = dump_queue(&hw_ep->out_list,
400 code = min(code, (int) max);
407 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
408 if (is_peripheral_active(musb)) {
411 if (hw_ep->ep_in.desc || !epnum) {
412 code = dump_ep(&hw_ep->ep_in, buf, max);
415 code = min(code, (int) max);
419 if (hw_ep->ep_out.desc) {
420 code = dump_ep(&hw_ep->ep_out, buf, max);
423 code = min(code, (int) max);
431 return buf - aBuffer;
434 /* Dump the current status and compile options.
435 * @param musb the device driver instance
436 * @param buffer where to dump the status; it must be big enough to hold the
437 * result otherwise "BAD THINGS HAPPENS(TM)".
439 static int dump_header_stats(struct musb *musb, char *buffer)
442 const void __iomem *mbase = musb->mregs;
445 count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
446 "(Power=%02x, DevCtl=%02x)\n",
447 (musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
448 musb_readb(mbase, MUSB_POWER),
449 musb_readb(mbase, MUSB_DEVCTL));
454 code = sprintf(buffer, "OTG state: %s:%d; %sactive\n",
455 otg_state_string(musb),musb->xceiv->state,
456 musb->is_active ? "" : "in");
462 code = sprintf(buffer,
464 #ifdef CONFIG_MUSB_PIO_ONLY
466 #elif defined(CONFIG_USB_TI_CPPI_DMA)
468 #elif defined(CONFIG_USB_INVENTRA_DMA)
470 #elif defined(CONFIG_USB_TUSB_OMAP_DMA)
476 #ifdef CONFIG_USB_MUSB_OTG
477 "otg (peripheral+host)"
478 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
480 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
483 ", debug=%d [eps=%d]\n",
491 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
492 code = sprintf(buffer, "Peripheral address: %02x\n",
493 musb_readb(musb->ctrl_base, MUSB_FADDR));
500 #ifdef CONFIG_USB_MUSB_HDRC_HCD
501 code = sprintf(buffer, "Root port status: %08x\n",
509 #ifdef CONFIG_ARCH_DAVINCI
510 code = sprintf(buffer,
511 "DaVinci: ctrl=%02x stat=%1x phy=%03x\n"
512 "\trndis=%05x auto=%04x intsrc=%08x intmsk=%08x"
514 musb_readl(musb->ctrl_base, DAVINCI_USB_CTRL_REG),
515 musb_readl(musb->ctrl_base, DAVINCI_USB_STAT_REG),
516 __raw_readl((void __force __iomem *)
517 IO_ADDRESS(USBPHY_CTL_PADDR)),
518 musb_readl(musb->ctrl_base, DAVINCI_RNDIS_REG),
519 musb_readl(musb->ctrl_base, DAVINCI_AUTOREQ_REG),
520 musb_readl(musb->ctrl_base,
521 DAVINCI_USB_INT_SOURCE_REG),
522 musb_readl(musb->ctrl_base,
523 DAVINCI_USB_INT_MASK_REG));
530 #ifdef CONFIG_USB_TUSB6010
531 code = sprintf(buffer,
532 "TUSB6010: devconf %08x, phy enable %08x drive %08x"
533 "\n\totg %03x timer %08x"
534 "\n\tprcm conf %08x mgmt %08x; int src %08x mask %08x"
536 musb_readl(musb->ctrl_base, TUSB_DEV_CONF),
537 musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL_ENABLE),
538 musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL),
539 musb_readl(musb->ctrl_base, TUSB_DEV_OTG_STAT),
540 musb_readl(musb->ctrl_base, TUSB_DEV_OTG_TIMER),
541 musb_readl(musb->ctrl_base, TUSB_PRCM_CONF),
542 musb_readl(musb->ctrl_base, TUSB_PRCM_MNGMT),
543 musb_readl(musb->ctrl_base, TUSB_INT_SRC),
544 musb_readl(musb->ctrl_base, TUSB_INT_MASK));
551 if (cppi_ti_dma() && musb->dma_controller) {
552 code = sprintf(buffer,
553 "CPPI: txcr=%d txsrc=%01x txena=%01x; "
554 "rxcr=%d rxsrc=%01x rxena=%01x "
556 musb_readl(musb->ctrl_base,
557 DAVINCI_TXCPPI_CTRL_REG),
558 musb_readl(musb->ctrl_base,
559 DAVINCI_TXCPPI_RAW_REG),
560 musb_readl(musb->ctrl_base,
561 DAVINCI_TXCPPI_INTENAB_REG),
562 musb_readl(musb->ctrl_base,
563 DAVINCI_RXCPPI_CTRL_REG),
564 musb_readl(musb->ctrl_base,
565 DAVINCI_RXCPPI_RAW_REG),
566 musb_readl(musb->ctrl_base,
567 DAVINCI_RXCPPI_INTENAB_REG));
574 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
575 if (is_peripheral_enabled(musb)) {
576 code = sprintf(buffer, "Gadget driver: %s\n",
578 ? musb->gadget_driver->driver.name
595 * D<num> set/query the debug level
596 * E rElinquish bus (OTG)
598 * F force session (OTG-unfriendly)
599 * H request host mode
600 * h cancel host request
604 * j clear HS test mode
606 * k clear FS test mode
607 * M set host test mode
608 * m clear host test mode
612 * T start sending TEST_PACKET
619 extern void musb_port_reset(struct musb *musb, bool do_reset);
620 extern void musb_port_suspend(struct musb *musb, bool do_suspend);
622 static int musb_proc_write(struct file *file, const char __user *buffer,
623 unsigned long count, void *data)
627 struct musb *musb = (struct musb *)data;
628 void __iomem *mbase = musb->mregs;
630 struct usb_hcd *hcd = musb_to_hcd(musb);
631 struct usb_bus *bus = hcd_to_bus(hcd);
633 /* MOD_INC_USE_COUNT; */
635 if (unlikely(copy_from_user(&cmd, buffer, 1)))
642 reg = musb_readb(mbase, MUSB_POWER);
643 reg |= MUSB_POWER_SOFTCONN;
644 musb_writeb(mbase, MUSB_POWER, reg);
650 reg = musb_readb(mbase, MUSB_POWER);
651 reg &= ~MUSB_POWER_SOFTCONN;
652 musb_writeb(mbase, MUSB_POWER, reg);
658 reg = musb_readb(mbase, MUSB_POWER);
659 reg |= MUSB_POWER_HSENAB;
660 musb_writeb(mbase, MUSB_POWER, reg);
666 reg = musb_readb(mbase, MUSB_POWER);
667 reg &= ~MUSB_POWER_HSENAB;
668 musb_writeb(mbase, MUSB_POWER, reg);
674 reg = musb_readb(mbase, MUSB_DEVCTL);
675 reg |= MUSB_DEVCTL_SESSION;
676 musb_writeb(mbase, MUSB_DEVCTL, reg);
682 reg = musb_readb(mbase, MUSB_DEVCTL);
683 reg &= ~MUSB_DEVCTL_SESSION;
684 musb_writeb(mbase, MUSB_DEVCTL, reg);
690 reg = musb_readb(mbase, MUSB_DEVCTL);
691 reg |= MUSB_DEVCTL_HR;
692 musb_writeb(mbase, MUSB_DEVCTL, reg);
693 /* MUSB_HST_MODE( ((struct musb*)data) ); */
694 /* WARNING("Host Mode\n"); */
700 reg = musb_readb(mbase, MUSB_DEVCTL);
701 reg &= ~MUSB_DEVCTL_HR;
702 musb_writeb(mbase, MUSB_DEVCTL, reg);
708 musb_load_testpacket(musb);
709 musb_writeb(mbase, MUSB_TESTMODE,
716 reg = musb_readb(mbase, MUSB_TESTMODE);
717 reg |= MUSB_TEST_FORCE_HOST;
718 musb_writeb(mbase, MUSB_TESTMODE, reg);
724 reg = musb_readb(mbase, MUSB_TESTMODE);
725 reg &= ~MUSB_TEST_FORCE_HOST;
726 musb_writeb(mbase, MUSB_TESTMODE, reg);
728 musb->xceiv->state = OTG_STATE_B_IDLE;
733 musb->xceiv->state = OTG_STATE_A_HOST;
738 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
744 reg = musb_readb(mbase, MUSB_TESTMODE);
745 reg |= MUSB_TEST_FORCE_HS;
746 musb_writeb(mbase, MUSB_TESTMODE, reg);
752 reg = musb_readb(mbase, MUSB_TESTMODE);
753 reg &= ~MUSB_TEST_FORCE_HS;
754 musb_writeb(mbase, MUSB_TESTMODE, reg);
760 reg = musb_readb(mbase, MUSB_TESTMODE);
761 reg |= MUSB_TEST_FORCE_FS;
762 musb_writeb(mbase, MUSB_TESTMODE, reg);
768 reg = musb_readb(mbase, MUSB_TESTMODE);
769 reg &= ~MUSB_TEST_FORCE_FS;
770 musb_writeb(mbase, MUSB_TESTMODE, reg);
776 musb_force_term(mbase,MUSB_TERM_HOST_HIGHSPEED);
781 musb_force_term(mbase,MUSB_TERM_HOST_FULLSPEED);
786 musb_force_term(mbase,MUSB_TERM_HOST_LOWSPEED);
790 musb_port_reset(musb, true);
791 while (time_before(jiffies, musb->rh_timer))
793 musb_port_reset(musb, false);
798 usb_hcd_resume_root_hub(hcd);
803 usb_bus_start_enum(bus,bus->otg_port);
808 musb_port_suspend(musb, true);
813 musb_port_suspend(musb, false);
814 /*How to end sanely? */
815 musb_port_reset(musb, true);
816 while (time_before(jiffies, musb->rh_timer))
818 musb_port_reset(musb, false);
823 INFO("?: you are seeing it\n");
824 INFO("C/c: soft connect enable/disable\n");
825 INFO("I/i: hispeed enable/disable\n");
826 INFO("F: force session start\n");
827 INFO("H: host mode\n");
828 INFO("T: start sending TEST_PACKET\n");
832 ERR("Command %c not implemented\n", cmd);
836 musb_platform_try_idle(musb, 0);
842 static int musb_proc_read(char *page, char **start,
843 off_t off, int count, int *eof, void *data)
848 struct musb *musb = data;
852 count -= 1; /* for NUL at end */
853 count -= 20; /* Padding */
858 spin_lock_irqsave(&musb->lock, flags);
860 code = dump_header_stats(musb, buffer);
869 /* generate the report for the end points */
870 /* REVISIT ... not unless something's connected! */
871 for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
873 code = dump_end_info(musb, epnum, buffer, count);
885 musb_platform_try_idle(musb, 0);
887 spin_unlock_irqrestore(&musb->lock, flags);
893 return buffer - page;
896 void __devexit musb_debug_delete(char *name, struct musb *musb)
898 if (musb->proc_entry)
899 remove_proc_entry(name, NULL);
902 struct proc_dir_entry *__init
903 musb_debug_create(char *name, struct musb *data)
905 struct proc_dir_entry *pde;
907 /* FIXME convert everything to seq_file; then later, debugfs */
912 pde = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, NULL);
913 data->proc_entry = pde;
916 /* pde->owner = THIS_MODULE; */
918 pde->read_proc = musb_proc_read;
919 pde->write_proc = musb_proc_write;
923 pr_debug("Registered /proc/%s\n", name);
925 pr_debug("Cannot create a valid proc file entry");