2 * MUSB OTG driver debug support
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <linux/kernel.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/uaccess.h> /* FIXME remove procfs writes */
39 #include <mach/hardware.h>
41 #include "musb_core.h"
45 extern unsigned musb_debug;
47 #ifdef CONFIG_USB_MUSB_HDRC_HCD
49 static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
53 struct usb_host_endpoint *hep = qh->hep;
56 count = snprintf(buf, max, " qh %p dev%d ep%d%s max%d\n",
57 qh, qh->dev->devnum, qh->epnum,
58 ({ char *s; switch (qh->type) {
59 case USB_ENDPOINT_XFER_BULK:
61 case USB_ENDPOINT_XFER_INT:
63 case USB_ENDPOINT_XFER_CONTROL:
74 list_for_each_entry(urb, &hep->urb_list, urb_list) {
75 tmp = snprintf(buf, max, "\t%s urb %p %d/%d\n",
76 usb_pipein(urb->pipe) ? "in" : "out",
77 urb, urb->actual_length,
78 urb->transfer_buffer_length);
81 tmp = min(tmp, (int)max);
90 dump_queue(struct list_head *q, char *buf, unsigned max)
95 list_for_each_entry(qh, q, ring) {
98 tmp = dump_qh(qh, buf, max);
101 tmp = min(tmp, (int)max);
111 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
112 static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
116 void __iomem *regs = ep->hw_ep->regs;
120 if (ep->hw_ep->tx_double_buffered)
123 if (ep->hw_ep->rx_double_buffered)
128 struct usb_request *req;
130 code = snprintf(buf, max,
131 "\n%s (hw%d): %s%s, csr %04x maxp %04x\n",
132 ep->name, ep->current_epnum,
133 mode, ep->dma ? " dma" : "",
135 (ep->is_in || !ep->current_epnum)
138 musb_readw(regs, ep->is_in
144 code = min(code, (int) max);
148 if (cppi_ti_dma() && ep->current_epnum) {
149 unsigned cppi = ep->current_epnum - 1;
150 void __iomem *base = ep->musb->ctrl_base;
151 unsigned off1 = cppi << 2;
152 void __iomem *ram = base;
156 ram += DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
159 ram += DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
160 snprintf(tmp, sizeof tmp, "%d left, ",
162 DAVINCI_RXCPPI_BUFCNT0_REG + off1));
165 code = snprintf(buf, max, "%cX DMA%d: %s"
166 "%08x %08x, %08x %08x; "
167 "%08x %08x %08x .. %08x\n",
168 ep->is_in ? 'T' : 'R',
169 ep->current_epnum - 1, tmp,
170 musb_readl(ram, 0 * 4),
171 musb_readl(ram, 1 * 4),
172 musb_readl(ram, 2 * 4),
173 musb_readl(ram, 3 * 4),
174 musb_readl(ram, 4 * 4),
175 musb_readl(ram, 5 * 4),
176 musb_readl(ram, 6 * 4),
177 musb_readl(ram, 7 * 4));
180 code = min(code, (int) max);
185 if (list_empty(&ep->req_list)) {
186 code = snprintf(buf, max, "\t(queue empty)\n");
189 code = min(code, (int) max);
194 list_for_each_entry(req, &ep->req_list, list) {
195 code = snprintf(buf, max, "\treq %p, %s%s%d/%d\n",
197 req->zero ? "zero, " : "",
198 req->short_not_ok ? "!short, " : "",
199 req->actual, req->length);
202 code = min(code, (int) max);
212 dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
216 struct musb_hw_ep *hw_ep = &musb->endpoints[epnum];
219 musb_ep_select(musb->mregs, epnum);
220 #ifdef CONFIG_USB_MUSB_HDRC_HCD
221 if (is_host_active(musb)) {
222 int dump_rx, dump_tx;
223 void __iomem *regs = hw_ep->regs;
225 /* TEMPORARY (!) until we have a real periodic
229 /* control is shared, uses RX queue
230 * but (mostly) shadowed tx registers
232 dump_tx = !list_empty(&hw_ep->in_list);
234 } else if (hw_ep == musb->bulk_ep) {
235 dump_tx = !list_empty(&hw_ep->out_list);
236 dump_rx = !list_empty(&hw_ep->in_list);
243 code = snprintf(buf, max,
244 "\nRX%d: %s rxcsr %04x interval %02x "
245 "max %04x type %02x; "
246 "dev %d hub %d port %d"
249 hw_ep->rx_double_buffered
251 musb_readw(regs, MUSB_RXCSR),
252 musb_readb(regs, MUSB_RXINTERVAL),
253 musb_readw(regs, MUSB_RXMAXP),
254 musb_readb(regs, MUSB_RXTYPE),
255 /* FIXME: assumes multipoint */
256 musb_readb(musb->mregs,
257 MUSB_BUSCTL_OFFSET(epnum,
259 musb_readb(musb->mregs,
260 MUSB_BUSCTL_OFFSET(epnum,
262 musb_readb(musb->mregs,
263 MUSB_BUSCTL_OFFSET(epnum,
268 code = min(code, (int) max);
274 && hw_ep->rx_channel) {
275 unsigned cppi = epnum - 1;
276 unsigned off1 = cppi << 2;
281 base = musb->ctrl_base;
282 ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
284 snprintf(tmp, sizeof tmp, "%d left, ",
286 DAVINCI_RXCPPI_BUFCNT0_REG
289 code = snprintf(buf, max,
291 "%08x %08x, %08x %08x; "
292 "%08x %08x %08x .. %08x\n",
294 musb_readl(ram, 0 * 4),
295 musb_readl(ram, 1 * 4),
296 musb_readl(ram, 2 * 4),
297 musb_readl(ram, 3 * 4),
298 musb_readl(ram, 4 * 4),
299 musb_readl(ram, 5 * 4),
300 musb_readl(ram, 6 * 4),
301 musb_readl(ram, 7 * 4));
304 code = min(code, (int) max);
309 if (hw_ep == musb->bulk_ep
312 code = dump_queue(&hw_ep->in_list,
316 code = min(code, (int) max);
323 code = snprintf(buf, max,
324 "\nTX%d: %s txcsr %04x interval %02x "
325 "max %04x type %02x; "
326 "dev %d hub %d port %d"
329 hw_ep->tx_double_buffered
331 musb_readw(regs, MUSB_TXCSR),
332 musb_readb(regs, MUSB_TXINTERVAL),
333 musb_readw(regs, MUSB_TXMAXP),
334 musb_readb(regs, MUSB_TXTYPE),
335 /* FIXME: assumes multipoint */
336 musb_readb(musb->mregs,
337 MUSB_BUSCTL_OFFSET(epnum,
339 musb_readb(musb->mregs,
340 MUSB_BUSCTL_OFFSET(epnum,
342 musb_readb(musb->mregs,
343 MUSB_BUSCTL_OFFSET(epnum,
348 code = min(code, (int) max);
354 && hw_ep->tx_channel) {
355 unsigned cppi = epnum - 1;
359 base = musb->ctrl_base;
360 ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
362 code = snprintf(buf, max,
364 "%08x %08x, %08x %08x; "
365 "%08x %08x %08x .. %08x\n",
367 musb_readl(ram, 0 * 4),
368 musb_readl(ram, 1 * 4),
369 musb_readl(ram, 2 * 4),
370 musb_readl(ram, 3 * 4),
371 musb_readl(ram, 4 * 4),
372 musb_readl(ram, 5 * 4),
373 musb_readl(ram, 6 * 4),
374 musb_readl(ram, 7 * 4));
377 code = min(code, (int) max);
382 if (hw_ep == musb->control_ep
385 code = dump_queue(&hw_ep->in_list,
389 code = min(code, (int) max);
392 } else if (hw_ep == musb->bulk_ep
395 code = dump_queue(&hw_ep->out_list,
399 code = min(code, (int) max);
406 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
407 if (is_peripheral_active(musb)) {
410 if (hw_ep->ep_in.desc || !epnum) {
411 code = dump_ep(&hw_ep->ep_in, buf, max);
414 code = min(code, (int) max);
418 if (hw_ep->ep_out.desc) {
419 code = dump_ep(&hw_ep->ep_out, buf, max);
422 code = min(code, (int) max);
430 return buf - aBuffer;
433 /* Dump the current status and compile options.
434 * @param musb the device driver instance
435 * @param buffer where to dump the status; it must be big enough to hold the
436 * result otherwise "BAD THINGS HAPPENS(TM)".
438 static int dump_header_stats(struct musb *musb, char *buffer)
441 const void __iomem *mbase = musb->mregs;
444 count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
445 "(Power=%02x, DevCtl=%02x)\n",
446 (musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
447 musb_readb(mbase, MUSB_POWER),
448 musb_readb(mbase, MUSB_DEVCTL));
453 code = sprintf(buffer, "OTG state: %s; %sactive\n",
454 otg_state_string(musb),
455 musb->is_active ? "" : "in");
461 code = sprintf(buffer,
463 #ifdef CONFIG_MUSB_PIO_ONLY
465 #elif defined(CONFIG_USB_TI_CPPI_DMA)
467 #elif defined(CONFIG_USB_INVENTRA_DMA)
469 #elif defined(CONFIG_USB_TUSB_OMAP_DMA)
475 #ifdef CONFIG_USB_MUSB_OTG
476 "otg (peripheral+host)"
477 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
479 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
482 ", debug=%d [eps=%d]\n",
490 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
491 code = sprintf(buffer, "Peripheral address: %02x\n",
492 musb_readb(musb->ctrl_base, MUSB_FADDR));
499 #ifdef CONFIG_USB_MUSB_HDRC_HCD
500 code = sprintf(buffer, "Root port status: %08x\n",
508 #ifdef CONFIG_ARCH_DAVINCI
509 code = sprintf(buffer,
510 "DaVinci: ctrl=%02x stat=%1x phy=%03x\n"
511 "\trndis=%05x auto=%04x intsrc=%08x intmsk=%08x"
513 musb_readl(musb->ctrl_base, DAVINCI_USB_CTRL_REG),
514 musb_readl(musb->ctrl_base, DAVINCI_USB_STAT_REG),
515 __raw_readl((void __force __iomem *)
516 IO_ADDRESS(USBPHY_CTL_PADDR)),
517 musb_readl(musb->ctrl_base, DAVINCI_RNDIS_REG),
518 musb_readl(musb->ctrl_base, DAVINCI_AUTOREQ_REG),
519 musb_readl(musb->ctrl_base,
520 DAVINCI_USB_INT_SOURCE_REG),
521 musb_readl(musb->ctrl_base,
522 DAVINCI_USB_INT_MASK_REG));
529 #ifdef CONFIG_USB_TUSB6010
530 code = sprintf(buffer,
531 "TUSB6010: devconf %08x, phy enable %08x drive %08x"
532 "\n\totg %03x timer %08x"
533 "\n\tprcm conf %08x mgmt %08x; int src %08x mask %08x"
535 musb_readl(musb->ctrl_base, TUSB_DEV_CONF),
536 musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL_ENABLE),
537 musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL),
538 musb_readl(musb->ctrl_base, TUSB_DEV_OTG_STAT),
539 musb_readl(musb->ctrl_base, TUSB_DEV_OTG_TIMER),
540 musb_readl(musb->ctrl_base, TUSB_PRCM_CONF),
541 musb_readl(musb->ctrl_base, TUSB_PRCM_MNGMT),
542 musb_readl(musb->ctrl_base, TUSB_INT_SRC),
543 musb_readl(musb->ctrl_base, TUSB_INT_MASK));
550 if (cppi_ti_dma() && musb->dma_controller) {
551 code = sprintf(buffer,
552 "CPPI: txcr=%d txsrc=%01x txena=%01x; "
553 "rxcr=%d rxsrc=%01x rxena=%01x "
555 musb_readl(musb->ctrl_base,
556 DAVINCI_TXCPPI_CTRL_REG),
557 musb_readl(musb->ctrl_base,
558 DAVINCI_TXCPPI_RAW_REG),
559 musb_readl(musb->ctrl_base,
560 DAVINCI_TXCPPI_INTENAB_REG),
561 musb_readl(musb->ctrl_base,
562 DAVINCI_RXCPPI_CTRL_REG),
563 musb_readl(musb->ctrl_base,
564 DAVINCI_RXCPPI_RAW_REG),
565 musb_readl(musb->ctrl_base,
566 DAVINCI_RXCPPI_INTENAB_REG));
573 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
574 if (is_peripheral_enabled(musb)) {
575 code = sprintf(buffer, "Gadget driver: %s\n",
577 ? musb->gadget_driver->driver.name
597 * F force session (OTG-unfriendly)
598 * E rElinquish bus (OTG)
599 * H request host mode
600 * h cancel host request
601 * T start sending TEST_PACKET
602 * D<num> set/query the debug level
604 static int musb_proc_write(struct file *file, const char __user *buffer,
605 unsigned long count, void *data)
609 struct musb *musb = (struct musb *)data;
610 void __iomem *mbase = musb->mregs;
612 /* MOD_INC_USE_COUNT; */
614 if (unlikely(copy_from_user(&cmd, buffer, 1)))
620 reg = musb_readb(mbase, MUSB_POWER)
621 | MUSB_POWER_SOFTCONN;
622 musb_writeb(mbase, MUSB_POWER, reg);
628 reg = musb_readb(mbase, MUSB_POWER)
629 & ~MUSB_POWER_SOFTCONN;
630 musb_writeb(mbase, MUSB_POWER, reg);
636 reg = musb_readb(mbase, MUSB_POWER)
638 musb_writeb(mbase, MUSB_POWER, reg);
644 reg = musb_readb(mbase, MUSB_POWER)
645 & ~MUSB_POWER_HSENAB;
646 musb_writeb(mbase, MUSB_POWER, reg);
651 reg = musb_readb(mbase, MUSB_DEVCTL);
652 reg |= MUSB_DEVCTL_SESSION;
653 musb_writeb(mbase, MUSB_DEVCTL, reg);
658 reg = musb_readb(mbase, MUSB_DEVCTL);
659 reg |= MUSB_DEVCTL_HR;
660 musb_writeb(mbase, MUSB_DEVCTL, reg);
661 /* MUSB_HST_MODE( ((struct musb*)data) ); */
662 /* WARNING("Host Mode\n"); */
668 reg = musb_readb(mbase, MUSB_DEVCTL);
669 reg &= ~MUSB_DEVCTL_HR;
670 musb_writeb(mbase, MUSB_DEVCTL, reg);
676 musb_load_testpacket(musb);
677 musb_writeb(mbase, MUSB_TESTMODE,
683 INFO("?: you are seeing it\n");
684 INFO("C/c: soft connect enable/disable\n");
685 INFO("I/i: hispeed enable/disable\n");
686 INFO("F: force session start\n");
687 INFO("H: host mode\n");
688 INFO("T: start sending TEST_PACKET\n");
692 ERR("Command %c not implemented\n", cmd);
696 musb_platform_try_idle(musb, 0);
701 static int musb_proc_read(char *page, char **start,
702 off_t off, int count, int *eof, void *data)
707 struct musb *musb = data;
711 count -= 1; /* for NUL at end */
715 spin_lock_irqsave(&musb->lock, flags);
717 code = dump_header_stats(musb, buffer);
723 /* generate the report for the end points */
724 /* REVISIT ... not unless something's connected! */
725 for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
727 code = dump_end_info(musb, epnum, buffer, count);
734 musb_platform_try_idle(musb, 0);
736 spin_unlock_irqrestore(&musb->lock, flags);
739 return buffer - page;
742 void __devexit musb_debug_delete(char *name, struct musb *musb)
744 if (musb->proc_entry)
745 remove_proc_entry(name, NULL);
748 struct proc_dir_entry *__init
749 musb_debug_create(char *name, struct musb *data)
751 struct proc_dir_entry *pde;
753 /* FIXME convert everything to seq_file; then later, debugfs */
758 pde = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, NULL);
759 data->proc_entry = pde;
762 /* pde->owner = THIS_MODULE; */
764 pde->read_proc = musb_proc_read;
765 pde->write_proc = musb_proc_write;
769 pr_debug("Registered /proc/%s\n", name);
771 pr_debug("Cannot create a valid proc file entry");