917a55d24b7f6985895a03da3e957ea791979675
[mardrone] / mardrone / ARDrone_SDK_Version_1_8_20110726 / ARDroneLib / VLIB / Platform / arm9_P6 / video_dct_p6.h
1 #ifndef _VIDEO_DCT_P6_H_
2 #define _VIDEO_DCT_P6_H_
3
4 // #include <VP_Os/vp_os_types.h>
5 #include <VLIB/video_dct.h>
6
7 ////////////////////////////////////////////////////
8 // Parrot proprietary DCT registers
9 ////////////////////////////////////////////////////
10
11 // Parrot DCT address: 0xD00B0000
12 #define DCT_STATUS              0x000       // Status Register
13 #define DCT_ITEN                0x004       // Interrupt Enable Register
14 #define DCT_ITACK               0x008       // Interrupt Acknowledge Register
15 #define DCT_CONTROL             0x040       // Control Register
16 #define DCT_DMA                 0x010       // Dma Register
17 #define DCT_DMAINT                              0x02C
18 #define DCT_RESET                               0x03C
19 #define DCT_START                               0x00C
20 #define DCT_CONFIG                              0x028
21 #define DCT_ORIG_Y_ADDR         0x044       // Address Register
22 #define DCT_ORIG_CU_ADDR        0x048       // Address Register
23 #define DCT_ORIG_CV_ADDR        0x04C       // Address Register
24 #define DCT_DEST_Y_ADDR         0x050       // Address Register
25 #define DCT_DEST_CU_ADDR        0x054       // Address Register
26 #define DCT_DEST_CV_ADDR        0x058       // Address Register
27 #define DCT_LINEOFFSET          0x05C       // Line size
28 #define DCT_Q_ADDR                              0x064           // quantization table
29 //#define DCT_DEBUG               0x030?       // Debug register
30 //#define DCT_SIGNATURE           0x034?       // Signature Register
31
32
33 // Registers bitwise definitions
34 // Status register
35 #define DCT_STATUS_END_OK    (1<<0)        // DCT Done
36 //#define DCT_STATUS_ERROR     (1<<1)        // DCT Error ?
37
38 // Interrupt enable register
39 #define DCT_ITEN_END_OK      (1<<0)        // IT Done enable
40 //#define DCT_ITEN_ERROR       (1<<1)        // IT Error enable ?
41
42 // Interrupt Acknowledge register
43 #define DCT_ITACK_END_OK     (1<<0)        // IT Done acknowledge
44 //#define DCT_ITACK_ERROR      (1<<1)        // IT Error acknowledge ?
45
46 // DCT control mode (forward or inverse dct)
47 #define DCT_CTRLMODE_FDCT     0
48 #define DCT_CTRLMODE_IDCT     1
49
50
51 //! write to a DCT register
52 #define dct_write_reg( _reg_, _value_ ) \
53  (*((volatile CYG_WORD32 *)(PARROT5_DCT +(_reg_))) = (CYG_WORD32)(_value_))
54
55 //! read a DCT register
56 #define dct_read_reg(_reg_ ) \
57  (*((volatile CYG_WORD32 *)(PARROT5_DCT+(_reg_))))
58
59 typedef enum {
60   DCT_DMA_INCR    = 0,                    //!<  4 bytes DMA burst
61   DCT_DMA_INCR4   = 1,                    //!< 16 bytes DMA burst
62   DCT_DMA_INCR8   = 2,                    //!< 32 bytes DMA burst
63   DCT_DMA_INCR16  = 3,                    //!< 64 bytes DMA burst
64 } DCT_DMA_BURST_MODE;
65
66 C_RESULT video_dct_p6_init(void);
67 C_RESULT video_dct_p6_close(void);
68
69 C_RESULT video_dct_p6p_init(void);
70
71
72 int16_t* video_fdct_quant_compute(int16_t* in, int16_t* out, int32_t num_macro_blocks,int32_t quant);
73 //int16_t* video_idct_compute(int16_t* in, int16_t* out, int32_t num_macro_blocks);
74
75 #endif // ! _VIDEO_DCT_P6P_H_