more dummy regs & clean-up for twl4030
[qemu] / dma-helpers.c
1 /*
2  * DMA helper functions
3  *
4  * Copyright (c) 2009 Red Hat
5  *
6  * This work is licensed under the terms of the GNU General Public License
7  * (GNU GPL), version 2 or later.
8  */
9
10 #include "dma.h"
11 #include "block_int.h"
12
13 static AIOPool dma_aio_pool;
14
15 void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint)
16 {
17     qsg->sg = qemu_malloc(alloc_hint * sizeof(ScatterGatherEntry));
18     qsg->nsg = 0;
19     qsg->nalloc = alloc_hint;
20     qsg->size = 0;
21 }
22
23 void qemu_sglist_add(QEMUSGList *qsg, target_phys_addr_t base,
24                      target_phys_addr_t len)
25 {
26     if (qsg->nsg == qsg->nalloc) {
27         qsg->nalloc = 2 * qsg->nalloc + 1;
28         qsg->sg = qemu_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
29     }
30     qsg->sg[qsg->nsg].base = base;
31     qsg->sg[qsg->nsg].len = len;
32     qsg->size += len;
33     ++qsg->nsg;
34 }
35
36 void qemu_sglist_destroy(QEMUSGList *qsg)
37 {
38     qemu_free(qsg->sg);
39 }
40
41 typedef struct {
42     BlockDriverAIOCB common;
43     BlockDriverState *bs;
44     BlockDriverAIOCB *acb;
45     QEMUSGList *sg;
46     uint64_t sector_num;
47     int is_write;
48     int sg_cur_index;
49     target_phys_addr_t sg_cur_byte;
50     QEMUIOVector iov;
51     QEMUBH *bh;
52 } DMAAIOCB;
53
54 static void dma_bdrv_cb(void *opaque, int ret);
55
56 static void reschedule_dma(void *opaque)
57 {
58     DMAAIOCB *dbs = (DMAAIOCB *)opaque;
59
60     qemu_bh_delete(dbs->bh);
61     dbs->bh = NULL;
62     dma_bdrv_cb(opaque, 0);
63 }
64
65 static void continue_after_map_failure(void *opaque)
66 {
67     DMAAIOCB *dbs = (DMAAIOCB *)opaque;
68
69     dbs->bh = qemu_bh_new(reschedule_dma, dbs);
70     qemu_bh_schedule(dbs->bh);
71 }
72
73 static void dma_bdrv_cb(void *opaque, int ret)
74 {
75     DMAAIOCB *dbs = (DMAAIOCB *)opaque;
76     target_phys_addr_t cur_addr, cur_len;
77     void *mem;
78     int i;
79
80     dbs->acb = NULL;
81     dbs->sector_num += dbs->iov.size / 512;
82     for (i = 0; i < dbs->iov.niov; ++i) {
83         cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base,
84                                   dbs->iov.iov[i].iov_len, !dbs->is_write,
85                                   dbs->iov.iov[i].iov_len);
86     }
87     qemu_iovec_reset(&dbs->iov);
88
89     if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
90         dbs->common.cb(dbs->common.opaque, ret);
91         qemu_iovec_destroy(&dbs->iov);
92         qemu_aio_release(dbs);
93         return;
94     }
95
96     while (dbs->sg_cur_index < dbs->sg->nsg) {
97         cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
98         cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
99         mem = cpu_physical_memory_map(cur_addr, &cur_len, !dbs->is_write);
100         if (!mem)
101             break;
102         qemu_iovec_add(&dbs->iov, mem, cur_len);
103         dbs->sg_cur_byte += cur_len;
104         if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
105             dbs->sg_cur_byte = 0;
106             ++dbs->sg_cur_index;
107         }
108     }
109
110     if (dbs->iov.size == 0) {
111         cpu_register_map_client(dbs, continue_after_map_failure);
112         return;
113     }
114
115     if (dbs->is_write) {
116         dbs->acb = bdrv_aio_writev(dbs->bs, dbs->sector_num, &dbs->iov,
117                                    dbs->iov.size / 512, dma_bdrv_cb, dbs);
118     } else {
119         dbs->acb = bdrv_aio_readv(dbs->bs, dbs->sector_num, &dbs->iov,
120                                   dbs->iov.size / 512, dma_bdrv_cb, dbs);
121     }
122 }
123
124 static BlockDriverAIOCB *dma_bdrv_io(
125     BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
126     BlockDriverCompletionFunc *cb, void *opaque,
127     int is_write)
128 {
129     DMAAIOCB *dbs =  qemu_aio_get_pool(&dma_aio_pool, bs, cb, opaque);
130
131     dbs->acb = NULL;
132     dbs->bs = bs;
133     dbs->sg = sg;
134     dbs->sector_num = sector_num;
135     dbs->sg_cur_index = 0;
136     dbs->sg_cur_byte = 0;
137     dbs->is_write = is_write;
138     dbs->bh = NULL;
139     qemu_iovec_init(&dbs->iov, sg->nsg);
140     dma_bdrv_cb(dbs, 0);
141     return &dbs->common;
142 }
143
144
145 BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
146                                 QEMUSGList *sg, uint64_t sector,
147                                 void (*cb)(void *opaque, int ret), void *opaque)
148 {
149     return dma_bdrv_io(bs, sg, sector, cb, opaque, 0);
150 }
151
152 BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
153                                  QEMUSGList *sg, uint64_t sector,
154                                  void (*cb)(void *opaque, int ret), void *opaque)
155 {
156     return dma_bdrv_io(bs, sg, sector, cb, opaque, 1);
157 }
158
159 static void dma_aio_cancel(BlockDriverAIOCB *acb)
160 {
161     DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
162
163     if (dbs->acb) {
164         bdrv_aio_cancel(dbs->acb);
165     }
166 }
167
168 void dma_helper_init(void)
169 {
170     aio_pool_init(&dma_aio_pool, sizeof(DMAAIOCB), dma_aio_cancel);
171 }