2 * CBUS three-pin bus and the Retu / Betty / Tahvo / Vilma / Avilma /
3 * Hinku / Vinku / Ahne / Pihi chips used in various Nokia platforms.
4 * Based on reverse-engineering of a linux driver.
6 * Copyright (C) 2008 Nokia Corporation
7 * Written by Andrzej Zaborowski <andrew@openedhand.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 or
12 * (at your option) version 3 of the License.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 #include "qemu-common.h"
51 struct cbus_slave_s *slave[8];
56 void (*io)(void *opaque, int rw, int reg, uint16_t *val);
60 static void cbus_io(struct cbus_priv_s *s)
62 if (s->slave[s->addr])
63 s->slave[s->addr]->io(s->slave[s->addr]->opaque,
64 s->rw, s->reg, &s->val);
66 hw_error("%s: bad slave address %i\n", __FUNCTION__, s->addr);
69 static void cbus_cycle(struct cbus_priv_s *s)
73 s->addr = (s->val >> 6) & 7;
74 s->rw = (s->val >> 5) & 1;
75 s->reg = (s->val >> 0) & 0x1f;
77 s->cycle = cbus_value;
90 s->cycle = cbus_address;
98 static void cbus_clk(void *opaque, int line, int level)
100 struct cbus_priv_s *s = (struct cbus_priv_s *) opaque;
102 if (!s->sel && level && !s->clk) {
104 s->val |= s->dat << (s->bit --);
106 qemu_set_irq(s->dat_out, (s->val >> (s->bit --)) & 1);
115 static void cbus_dat(void *opaque, int line, int level)
117 struct cbus_priv_s *s = (struct cbus_priv_s *) opaque;
122 static void cbus_sel(void *opaque, int line, int level)
124 struct cbus_priv_s *s = (struct cbus_priv_s *) opaque;
135 struct cbus_s *cbus_init(qemu_irq dat)
137 struct cbus_priv_s *s = (struct cbus_priv_s *) qemu_mallocz(sizeof(*s));
140 s->cbus.clk = qemu_allocate_irqs(cbus_clk, s, 1)[0];
141 s->cbus.dat = qemu_allocate_irqs(cbus_dat, s, 1)[0];
142 s->cbus.sel = qemu_allocate_irqs(cbus_sel, s, 1)[0];
151 void cbus_attach(struct cbus_s *bus, void *slave_opaque)
153 struct cbus_slave_s *slave = (struct cbus_slave_s *) slave_opaque;
154 struct cbus_priv_s *s = (struct cbus_priv_s *) bus;
156 s->slave[slave->addr] = slave;
175 struct cbus_slave_s cbus;
178 static void retu_interrupt_update(struct cbus_retu_s *s)
180 qemu_set_irq(s->irq, s->irqst & ~s->irqen);
183 #define RETU_REG_ASICR 0x00 /* (RO) ASIC ID & revision */
184 #define RETU_REG_IDR 0x01 /* (T) Interrupt ID */
185 #define RETU_REG_IMR 0x02 /* (RW) Interrupt mask */
186 #define RETU_REG_RTCDSR 0x03 /* (RW) RTC seconds register */
187 #define RETU_REG_RTCHMR 0x04 /* (RO) RTC hours and minutes reg */
188 #define RETU_REG_RTCHMAR 0x05 /* (RW) RTC hours and minutes set reg */
189 #define RETU_REG_RTCCALR 0x06 /* (RW) RTC calibration register */
190 #define RETU_REG_ADCR 0x08 /* (RW) ADC result register */
191 #define RETU_REG_ADCSCR 0x09 /* (RW) ADC sample control register */
192 #define RETU_REG_AFCR 0x0a /* (RW) AFC register */
193 #define RETU_REG_ANTIFR 0x0b /* (RW) AntiF register */
194 #define RETU_REG_CALIBR 0x0c /* (RW) CalibR register*/
195 #define RETU_REG_CCR1 0x0d /* (RW) Common control register 1 */
196 #define RETU_REG_CCR2 0x0e /* (RW) Common control register 2 */
197 #define RETU_REG_RCTRL_CLR 0x0f /* (T) Regulator clear register */
198 #define RETU_REG_RCTRL_SET 0x10 /* (T) Regulator set register */
199 #define RETU_REG_TXCR 0x11 /* (RW) TxC register */
200 #define RETU_REG_STATUS 0x16 /* (RO) Status register */
201 #define RETU_REG_WATCHDOG 0x17 /* (RW) Watchdog register */
202 #define RETU_REG_AUDTXR 0x18 /* (RW) Audio Codec Tx register */
203 #define RETU_REG_AUDPAR 0x19 /* (RW) AudioPA register */
204 #define RETU_REG_AUDRXR1 0x1a /* (RW) Audio receive register 1 */
205 #define RETU_REG_AUDRXR2 0x1b /* (RW) Audio receive register 2 */
206 #define RETU_REG_SGR1 0x1c /* (RW) */
207 #define RETU_REG_SCR1 0x1d /* (RW) */
208 #define RETU_REG_SGR2 0x1e /* (RW) */
209 #define RETU_REG_SCR2 0x1f /* (RW) */
211 /* Retu Interrupt sources */
213 retu_int_pwr = 0, /* Power button */
214 retu_int_char = 1, /* Charger */
215 retu_int_rtcs = 2, /* Seconds */
216 retu_int_rtcm = 3, /* Minutes */
217 retu_int_rtcd = 4, /* Days */
218 retu_int_rtca = 5, /* Alarm */
219 retu_int_hook = 6, /* Hook */
220 retu_int_head = 7, /* Headset */
221 retu_int_adcs = 8, /* ADC sample */
224 /* Retu ADC channel wiring */
226 retu_adc_bsi = 1, /* BSI */
227 retu_adc_batt_temp = 2, /* Battery temperature */
228 retu_adc_chg_volt = 3, /* Charger voltage */
229 retu_adc_head_det = 4, /* Headset detection */
230 retu_adc_hook_det = 5, /* Hook detection */
231 retu_adc_rf_gp = 6, /* RF GP */
232 retu_adc_tx_det = 7, /* Wideband Tx detection */
233 retu_adc_batt_volt = 8, /* Battery voltage */
234 retu_adc_sens = 10, /* Light sensor */
235 retu_adc_sens_temp = 11, /* Light sensor temperature */
236 retu_adc_bbatt_volt = 12, /* Backup battery voltage */
237 retu_adc_self_temp = 13, /* RETU temperature */
240 static inline uint16_t retu_read(struct cbus_retu_s *s, int reg)
243 printf("RETU read at %02x\n", reg);
248 return 0x0215 | (s->is_vilma << 7);
250 case RETU_REG_IDR: /* TODO: Or is this ffs(s->irqst)? */
256 case RETU_REG_RTCDSR:
257 case RETU_REG_RTCHMR:
258 case RETU_REG_RTCHMAR:
262 case RETU_REG_RTCCALR:
266 return (s->channel << 10) | s->result[s->channel];
267 case RETU_REG_ADCSCR:
271 case RETU_REG_ANTIFR:
272 case RETU_REG_CALIBR:
281 case RETU_REG_RCTRL_CLR:
282 case RETU_REG_RCTRL_SET:
287 case RETU_REG_STATUS:
290 case RETU_REG_WATCHDOG:
291 case RETU_REG_AUDTXR:
292 case RETU_REG_AUDPAR:
293 case RETU_REG_AUDRXR1:
294 case RETU_REG_AUDRXR2:
303 hw_error("%s: bad register %02x\n", __FUNCTION__, reg);
307 static inline void retu_write(struct cbus_retu_s *s, int reg, uint16_t val)
310 printf("RETU write of %04x at %02x\n", val, reg);
316 retu_interrupt_update(s);
321 retu_interrupt_update(s);
324 case RETU_REG_RTCDSR:
325 case RETU_REG_RTCHMAR:
329 case RETU_REG_RTCCALR:
334 s->channel = (val >> 10) & 0xf;
335 s->irqst |= 1 << retu_int_adcs;
336 retu_interrupt_update(s);
338 case RETU_REG_ADCSCR:
343 case RETU_REG_ANTIFR:
344 case RETU_REG_CALIBR:
353 case RETU_REG_RCTRL_CLR:
354 case RETU_REG_RCTRL_SET:
358 case RETU_REG_WATCHDOG:
359 if (val == 0 && (s->cc[0] & 2))
360 qemu_system_shutdown_request();
364 case RETU_REG_AUDTXR:
365 case RETU_REG_AUDPAR:
366 case RETU_REG_AUDRXR1:
367 case RETU_REG_AUDRXR2:
376 hw_error("%s: bad register %02x\n", __FUNCTION__, reg);
380 static void retu_io(void *opaque, int rw, int reg, uint16_t *val)
382 struct cbus_retu_s *s = (struct cbus_retu_s *) opaque;
385 *val = retu_read(s, reg);
387 retu_write(s, reg, *val);
390 void *retu_init(qemu_irq irq, int vilma)
392 struct cbus_retu_s *s = (struct cbus_retu_s *) qemu_mallocz(sizeof(*s));
398 s->is_vilma = !!vilma;
400 s->result[retu_adc_bsi] = 0x3c2;
401 s->result[retu_adc_batt_temp] = 0x0fc;
402 s->result[retu_adc_chg_volt] = 0x165;
403 s->result[retu_adc_head_det] = 123;
404 s->result[retu_adc_hook_det] = 1023;
405 s->result[retu_adc_rf_gp] = 0x11;
406 s->result[retu_adc_tx_det] = 0x11;
407 s->result[retu_adc_batt_volt] = 0x250;
408 s->result[retu_adc_sens] = 2;
409 s->result[retu_adc_sens_temp] = 0x11;
410 s->result[retu_adc_bbatt_volt] = 0x3d0;
411 s->result[retu_adc_self_temp] = 0x330;
414 s->cbus.io = retu_io;
420 void retu_key_event(void *retu, int state)
422 struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
423 struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
425 s->irqst |= 1 << retu_int_pwr;
426 retu_interrupt_update(s);
429 s->status &= ~(1 << 5);
435 static void retu_head_event(void *retu, int state)
437 struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
438 struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
440 if ((s->cc[0] & 0x500) == 0x500) { /* TODO: Which bits? */
441 /* TODO: reissue the interrupt every 100ms or so. */
442 s->irqst |= 1 << retu_int_head;
443 retu_interrupt_update(s);
447 s->result[retu_adc_head_det] = 50;
449 s->result[retu_adc_head_det] = 123;
452 static void retu_hook_event(void *retu, int state)
454 struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
455 struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
457 if ((s->cc[0] & 0x500) == 0x500) {
458 /* TODO: reissue the interrupt every 100ms or so. */
459 s->irqst |= 1 << retu_int_hook;
460 retu_interrupt_update(s);
464 s->result[retu_adc_hook_det] = 50;
466 s->result[retu_adc_hook_det] = 123;
471 struct cbus_tahvo_s {
481 struct cbus_slave_s cbus;
484 static void tahvo_interrupt_update(struct cbus_tahvo_s *s)
486 qemu_set_irq(s->irq, s->irqst & ~s->irqen);
489 #define TAHVO_REG_ASICR 0x00 /* (RO) ASIC ID & revision */
490 #define TAHVO_REG_IDR 0x01 /* (T) Interrupt ID */
491 #define TAHVO_REG_IDSR 0x02 /* (RO) Interrupt status */
492 #define TAHVO_REG_IMR 0x03 /* (RW) Interrupt mask */
493 #define TAHVO_REG_CHAPWMR 0x04 /* (RW) Charger PWM */
494 #define TAHVO_REG_LEDPWMR 0x05 /* (RW) LED PWM */
495 #define TAHVO_REG_USBR 0x06 /* (RW) USB control */
496 #define TAHVO_REG_RCR 0x07 /* (RW) Some kind of power management */
497 #define TAHVO_REG_CCR1 0x08 /* (RW) Common control register 1 */
498 #define TAHVO_REG_CCR2 0x09 /* (RW) Common control register 2 */
499 #define TAHVO_REG_TESTR1 0x0a /* (RW) Test register 1 */
500 #define TAHVO_REG_TESTR2 0x0b /* (RW) Test register 2 */
501 #define TAHVO_REG_NOPR 0x0c /* (RW) Number of periods */
502 #define TAHVO_REG_FRR 0x0d /* (RO) FR */
504 static inline uint16_t tahvo_read(struct cbus_tahvo_s *s, int reg)
507 printf("TAHVO read at %02x\n", reg);
511 case TAHVO_REG_ASICR:
512 return 0x0021 | (s->is_betty ? 0x0b00 : 0x0300); /* 22 in N810 */
515 case TAHVO_REG_IDSR: /* XXX: what does this do? */
521 case TAHVO_REG_CHAPWMR:
524 case TAHVO_REG_LEDPWMR:
535 case TAHVO_REG_TESTR1:
536 case TAHVO_REG_TESTR2:
542 hw_error("%s: bad register %02x\n", __FUNCTION__, reg);
546 static inline void tahvo_write(struct cbus_tahvo_s *s, int reg, uint16_t val)
549 printf("TAHVO write of %04x at %02x\n", val, reg);
555 tahvo_interrupt_update(s);
560 tahvo_interrupt_update(s);
563 case TAHVO_REG_CHAPWMR:
567 case TAHVO_REG_LEDPWMR:
568 if (s->backlight != (val & 0x7f)) {
569 s->backlight = val & 0x7f;
570 printf("%s: LCD backlight now at %i / 127\n",
571 __FUNCTION__, s->backlight);
585 case TAHVO_REG_TESTR1:
586 case TAHVO_REG_TESTR2:
592 hw_error("%s: bad register %02x\n", __FUNCTION__, reg);
596 static void tahvo_io(void *opaque, int rw, int reg, uint16_t *val)
598 struct cbus_tahvo_s *s = (struct cbus_tahvo_s *) opaque;
601 *val = tahvo_read(s, reg);
603 tahvo_write(s, reg, *val);
606 void *tahvo_init(qemu_irq irq, int betty)
608 struct cbus_tahvo_s *s = (struct cbus_tahvo_s *) qemu_mallocz(sizeof(*s));
613 s->is_betty = !!betty;
616 s->cbus.io = tahvo_io;