2 * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GPL.
10 /* The controller can support a variety of different displays, but we only
11 implement one. Most of the commends relating to brightness and geometry
17 //#define DEBUG_SSD0303 1
20 #define DPRINTF(fmt, args...) \
21 do { printf("ssd0303: " fmt , ##args); } while (0)
22 #define BADF(fmt, args...) \
23 do { fprintf(stderr, "ssd0303: error: " fmt , ##args); exit(1);} while (0)
25 #define DPRINTF(fmt, args...) do {} while(0)
26 #define BADF(fmt, args...) \
27 do { fprintf(stderr, "ssd0303: error: " fmt , ##args);} while (0)
30 /* Scaling factor for pixels. */
56 enum ssd0303_mode mode;
57 enum ssd0303_cmd cmd_state;
58 uint8_t framebuffer[132*8];
61 static int ssd0303_recv(i2c_slave *i2c)
63 BADF("Reads not implemented\n");
67 static int ssd0303_send(i2c_slave *i2c, uint8_t data)
69 ssd0303_state *s = (ssd0303_state *)i2c;
70 enum ssd0303_cmd old_cmd_state;
73 DPRINTF("byte 0x%02x\n", data);
75 s->mode = SSD0303_CMD;
76 else if (data == 0x40)
77 s->mode = SSD0303_DATA;
79 BADF("Unexpected byte 0x%x\n", data);
82 DPRINTF("data 0x%02x\n", data);
84 s->framebuffer[s->col + s->row * 132] = data;
90 old_cmd_state = s->cmd_state;
91 s->cmd_state = SSD0303_CMD_NONE;
92 switch (old_cmd_state) {
93 case SSD0303_CMD_NONE:
94 DPRINTF("cmd 0x%02x\n", data);
95 s->mode = SSD0303_IDLE;
97 case 0x00 ... 0x0f: /* Set lower colum address. */
98 s->col = (s->col & 0xf0) | (data & 0xf);
100 case 0x10 ... 0x20: /* Set higher column address. */
101 s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
103 case 0x40 ... 0x7f: /* Set start line. */
106 case 0x81: /* Set contrast (Ignored). */
107 s->cmd_state = SSD0303_CMD_SKIP1;
109 case 0xa0: /* Mirror off. */
112 case 0xa1: /* Mirror off. */
115 case 0xa4: /* Entire display off. */
118 case 0xa5: /* Entire display on. */
121 case 0xa6: /* Inverse off. */
124 case 0xa7: /* Inverse on. */
127 case 0xa8: /* Set multipled ratio (Ignored). */
128 s->cmd_state = SSD0303_CMD_SKIP1;
130 case 0xad: /* DC-DC power control. */
131 s->cmd_state = SSD0303_CMD_SKIP1;
133 case 0xae: /* Display off. */
136 case 0xaf: /* Display on. */
139 case 0xb0 ... 0xbf: /* Set Page address. */
142 case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
144 case 0xd3: /* Set display offset (Ignored). */
145 s->cmd_state = SSD0303_CMD_SKIP1;
147 case 0xd5: /* Set display clock (Ignored). */
148 s->cmd_state = SSD0303_CMD_SKIP1;
150 case 0xd8: /* Set color and power mode (Ignored). */
151 s->cmd_state = SSD0303_CMD_SKIP1;
153 case 0xd9: /* Set pre-charge period (Ignored). */
154 s->cmd_state = SSD0303_CMD_SKIP1;
156 case 0xda: /* Set COM pin configuration (Ignored). */
157 s->cmd_state = SSD0303_CMD_SKIP1;
159 case 0xdb: /* Set VCOM dselect level (Ignored). */
160 s->cmd_state = SSD0303_CMD_SKIP1;
162 case 0xe3: /* no-op. */
165 BADF("Unknown command: 0x%x\n", data);
168 case SSD0303_CMD_SKIP1:
169 DPRINTF("skip 0x%02x\n", data);
177 static void ssd0303_event(i2c_slave *i2c, enum i2c_event event)
179 ssd0303_state *s = (ssd0303_state *)i2c;
182 s->mode = SSD0303_IDLE;
192 static void ssd0303_update_display(void *opaque)
194 ssd0303_state *s = (ssd0303_state *)opaque;
201 char colortab[MAGNIFY * 8];
208 switch (ds_get_bits_per_pixel(s->ds)) {
224 BADF("Bad color depth\n");
227 dest_width *= MAGNIFY;
228 memset(colortab, 0xff, dest_width);
229 memset(colortab + dest_width, 0, dest_width);
231 colors[0] = colortab;
232 colors[1] = colortab;
233 } else if (s->inverse) {
234 colors[0] = colortab;
235 colors[1] = colortab + dest_width;
237 colors[0] = colortab + dest_width;
238 colors[1] = colortab;
240 dest = ds_get_data(s->ds);
241 for (y = 0; y < 16; y++) {
242 line = (y + s->start_line) & 63;
243 src = s->framebuffer + 132 * (line >> 3) + 36;
244 mask = 1 << (line & 7);
245 for (x = 0; x < 96; x++) {
246 memcpy(dest, colors[(*src & mask) != 0], dest_width);
250 for (x = 1; x < MAGNIFY; x++) {
251 memcpy(dest, dest - dest_width * 96, dest_width * 96);
252 dest += dest_width * 96;
256 dpy_update(s->ds, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
259 static void ssd0303_invalidate_display(void * opaque)
261 ssd0303_state *s = (ssd0303_state *)opaque;
265 static void ssd0303_save(QEMUFile *f, void *opaque)
267 ssd0303_state *s = (ssd0303_state *)opaque;
269 qemu_put_be32(f, s->row);
270 qemu_put_be32(f, s->col);
271 qemu_put_be32(f, s->start_line);
272 qemu_put_be32(f, s->mirror);
273 qemu_put_be32(f, s->flash);
274 qemu_put_be32(f, s->enabled);
275 qemu_put_be32(f, s->inverse);
276 qemu_put_be32(f, s->redraw);
277 qemu_put_be32(f, s->mode);
278 qemu_put_be32(f, s->cmd_state);
279 qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));
281 i2c_slave_save(f, &s->i2c);
284 static int ssd0303_load(QEMUFile *f, void *opaque, int version_id)
286 ssd0303_state *s = (ssd0303_state *)opaque;
291 s->row = qemu_get_be32(f);
292 s->col = qemu_get_be32(f);
293 s->start_line = qemu_get_be32(f);
294 s->mirror = qemu_get_be32(f);
295 s->flash = qemu_get_be32(f);
296 s->enabled = qemu_get_be32(f);
297 s->inverse = qemu_get_be32(f);
298 s->redraw = qemu_get_be32(f);
299 s->mode = qemu_get_be32(f);
300 s->cmd_state = qemu_get_be32(f);
301 qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));
303 i2c_slave_load(f, &s->i2c);
308 void ssd0303_init(i2c_bus *bus, int address)
312 s = (ssd0303_state *)i2c_slave_init(bus, address, sizeof(ssd0303_state));
313 s->i2c.event = ssd0303_event;
314 s->i2c.recv = ssd0303_recv;
315 s->i2c.send = ssd0303_send;
316 s->ds = graphic_console_init(ssd0303_update_display,
317 ssd0303_invalidate_display,
319 qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
320 register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);