4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
30 #include "qemu-common.h"
31 #include "cache-utils.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
40 const char *exec_path;
42 #if defined(CONFIG_USE_GUEST_BASE)
43 unsigned long mmap_min_addr = 0;
44 unsigned long guest_base = 0;
47 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
48 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
50 #if defined(__i386__) && !defined(CONFIG_STATIC)
51 /* Force usage of an ELF interpreter even if it is an ELF shared
53 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
56 /* for recent libc, we add these dummy symbols which are not declared
57 when generating a linked object (bug in ld ?) */
58 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
59 asm(".globl __preinit_array_start\n"
60 ".globl __preinit_array_end\n"
61 ".globl __init_array_start\n"
62 ".globl __init_array_end\n"
63 ".globl __fini_array_start\n"
64 ".globl __fini_array_end\n"
65 ".section \".rodata\"\n"
66 "__preinit_array_start:\n"
67 "__preinit_array_end:\n"
68 "__init_array_start:\n"
70 "__fini_array_start:\n"
76 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
77 we allocate a bigger stack. Need a better solution, for example
78 by remapping the process stack directly at the right place */
79 unsigned long x86_stack_size = 512 * 1024;
81 void gemu_log(const char *fmt, ...)
86 vfprintf(stderr, fmt, ap);
90 void cpu_outb(CPUState *env, int addr, int val)
92 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
95 void cpu_outw(CPUState *env, int addr, int val)
97 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
100 void cpu_outl(CPUState *env, int addr, int val)
102 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
105 int cpu_inb(CPUState *env, int addr)
107 fprintf(stderr, "inb: port=0x%04x\n", addr);
111 int cpu_inw(CPUState *env, int addr)
113 fprintf(stderr, "inw: port=0x%04x\n", addr);
117 int cpu_inl(CPUState *env, int addr)
119 fprintf(stderr, "inl: port=0x%04x\n", addr);
123 #if defined(TARGET_I386)
124 int cpu_get_pic_interrupt(CPUState *env)
130 /* timers for rdtsc */
134 static uint64_t emu_time;
136 int64_t cpu_get_real_ticks(void)
143 #if defined(USE_NPTL)
144 /***********************************************************/
145 /* Helper routines for implementing atomic operations. */
147 /* To implement exclusive operations we force all cpus to syncronise.
148 We don't require a full sync, only that no cpus are executing guest code.
149 The alternative is to map target atomic ops onto host equivalents,
150 which requires quite a lot of per host/target work. */
151 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
152 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
153 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
154 static int pending_cpus;
156 /* Make sure everything is in a consistent state for calling fork(). */
157 void fork_start(void)
160 pthread_mutex_lock(&tb_lock);
161 pthread_mutex_lock(&exclusive_lock);
164 void fork_end(int child)
167 /* Child processes created by fork() only have a single thread.
168 Discard information about the parent threads. */
169 first_cpu = thread_env;
170 thread_env->next_cpu = NULL;
172 pthread_mutex_init(&exclusive_lock, NULL);
173 pthread_cond_init(&exclusive_cond, NULL);
174 pthread_cond_init(&exclusive_resume, NULL);
175 pthread_mutex_init(&tb_lock, NULL);
176 gdbserver_fork(thread_env);
178 pthread_mutex_unlock(&exclusive_lock);
179 pthread_mutex_unlock(&tb_lock);
181 mmap_fork_end(child);
184 /* Wait for pending exclusive operations to complete. The exclusive lock
186 static inline void exclusive_idle(void)
188 while (pending_cpus) {
189 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
193 /* Start an exclusive operation.
194 Must only be called from outside cpu_arm_exec. */
195 static inline void start_exclusive(void)
198 pthread_mutex_lock(&exclusive_lock);
202 /* Make all other cpus stop executing. */
203 for (other = first_cpu; other; other = other->next_cpu) {
204 if (other->running) {
206 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
209 if (pending_cpus > 1) {
210 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
214 /* Finish an exclusive operation. */
215 static inline void end_exclusive(void)
218 pthread_cond_broadcast(&exclusive_resume);
219 pthread_mutex_unlock(&exclusive_lock);
222 /* Wait for exclusive ops to finish, and begin cpu execution. */
223 static inline void cpu_exec_start(CPUState *env)
225 pthread_mutex_lock(&exclusive_lock);
228 pthread_mutex_unlock(&exclusive_lock);
231 /* Mark cpu as not executing, and release pending exclusive ops. */
232 static inline void cpu_exec_end(CPUState *env)
234 pthread_mutex_lock(&exclusive_lock);
236 if (pending_cpus > 1) {
238 if (pending_cpus == 1) {
239 pthread_cond_signal(&exclusive_cond);
243 pthread_mutex_unlock(&exclusive_lock);
245 #else /* if !USE_NPTL */
246 /* These are no-ops because we are not threadsafe. */
247 static inline void cpu_exec_start(CPUState *env)
251 static inline void cpu_exec_end(CPUState *env)
255 static inline void start_exclusive(void)
259 static inline void end_exclusive(void)
263 void fork_start(void)
267 void fork_end(int child)
270 gdbserver_fork(thread_env);
277 /***********************************************************/
278 /* CPUX86 core interface */
280 void cpu_smm_update(CPUState *env)
284 uint64_t cpu_get_tsc(CPUX86State *env)
286 return cpu_get_real_ticks();
289 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
294 e1 = (addr << 16) | (limit & 0xffff);
295 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
302 static uint64_t *idt_table;
304 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
305 uint64_t addr, unsigned int sel)
308 e1 = (addr & 0xffff) | (sel << 16);
309 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
313 p[2] = tswap32(addr >> 32);
316 /* only dpl matters as we do only user space emulation */
317 static void set_idt(int n, unsigned int dpl)
319 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
322 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
323 uint32_t addr, unsigned int sel)
326 e1 = (addr & 0xffff) | (sel << 16);
327 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
333 /* only dpl matters as we do only user space emulation */
334 static void set_idt(int n, unsigned int dpl)
336 set_gate(idt_table + n, 0, dpl, 0, 0);
340 void cpu_loop(CPUX86State *env)
344 target_siginfo_t info;
347 trapnr = cpu_x86_exec(env);
350 /* linux syscall from int $0x80 */
351 env->regs[R_EAX] = do_syscall(env,
362 /* linux syscall from syscall intruction */
363 env->regs[R_EAX] = do_syscall(env,
371 env->eip = env->exception_next_eip;
376 info.si_signo = SIGBUS;
378 info.si_code = TARGET_SI_KERNEL;
379 info._sifields._sigfault._addr = 0;
380 queue_signal(env, info.si_signo, &info);
383 /* XXX: potential problem if ABI32 */
384 #ifndef TARGET_X86_64
385 if (env->eflags & VM_MASK) {
386 handle_vm86_fault(env);
390 info.si_signo = SIGSEGV;
392 info.si_code = TARGET_SI_KERNEL;
393 info._sifields._sigfault._addr = 0;
394 queue_signal(env, info.si_signo, &info);
398 info.si_signo = SIGSEGV;
400 if (!(env->error_code & 1))
401 info.si_code = TARGET_SEGV_MAPERR;
403 info.si_code = TARGET_SEGV_ACCERR;
404 info._sifields._sigfault._addr = env->cr[2];
405 queue_signal(env, info.si_signo, &info);
408 #ifndef TARGET_X86_64
409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
414 /* division by zero */
415 info.si_signo = SIGFPE;
417 info.si_code = TARGET_FPE_INTDIV;
418 info._sifields._sigfault._addr = env->eip;
419 queue_signal(env, info.si_signo, &info);
424 #ifndef TARGET_X86_64
425 if (env->eflags & VM_MASK) {
426 handle_vm86_trap(env, trapnr);
430 info.si_signo = SIGTRAP;
432 if (trapnr == EXCP01_DB) {
433 info.si_code = TARGET_TRAP_BRKPT;
434 info._sifields._sigfault._addr = env->eip;
436 info.si_code = TARGET_SI_KERNEL;
437 info._sifields._sigfault._addr = 0;
439 queue_signal(env, info.si_signo, &info);
444 #ifndef TARGET_X86_64
445 if (env->eflags & VM_MASK) {
446 handle_vm86_trap(env, trapnr);
450 info.si_signo = SIGSEGV;
452 info.si_code = TARGET_SI_KERNEL;
453 info._sifields._sigfault._addr = 0;
454 queue_signal(env, info.si_signo, &info);
458 info.si_signo = SIGILL;
460 info.si_code = TARGET_ILL_ILLOPN;
461 info._sifields._sigfault._addr = env->eip;
462 queue_signal(env, info.si_signo, &info);
465 /* just indicate that signals should be handled asap */
471 sig = gdb_handlesig (env, TARGET_SIGTRAP);
476 info.si_code = TARGET_TRAP_BRKPT;
477 queue_signal(env, info.si_signo, &info);
482 pc = env->segs[R_CS].base + env->eip;
483 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
487 process_pending_signals(env);
494 static void arm_cache_flush(abi_ulong start, abi_ulong last)
496 abi_ulong addr, last1;
502 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
505 tb_invalidate_page_range(addr, last1 + 1);
512 /* Handle a jump to the kernel code page. */
514 do_kernel_trap(CPUARMState *env)
520 switch (env->regs[15]) {
521 case 0xffff0fa0: /* __kernel_memory_barrier */
522 /* ??? No-op. Will need to do better for SMP. */
524 case 0xffff0fc0: /* __kernel_cmpxchg */
525 /* XXX: This only works between threads, not between processes.
526 It's probably possible to implement this with native host
527 operations. However things like ldrex/strex are much harder so
528 there's not much point trying. */
530 cpsr = cpsr_read(env);
532 /* FIXME: This should SEGV if the access fails. */
533 if (get_user_u32(val, addr))
535 if (val == env->regs[0]) {
537 /* FIXME: Check for segfaults. */
538 put_user_u32(val, addr);
545 cpsr_write(env, cpsr, CPSR_C);
548 case 0xffff0fe0: /* __kernel_get_tls */
549 env->regs[0] = env->cp15.c13_tls2;
554 /* Jump back to the caller. */
555 addr = env->regs[14];
560 env->regs[15] = addr;
565 void cpu_loop(CPUARMState *env)
568 unsigned int n, insn;
569 target_siginfo_t info;
574 trapnr = cpu_arm_exec(env);
579 TaskState *ts = env->opaque;
583 /* we handle the FPU emulation here, as Linux */
584 /* we get the opcode */
585 /* FIXME - what to do if get_user() fails? */
586 get_user_u32(opcode, env->regs[15]);
588 rc = EmulateAll(opcode, &ts->fpa, env);
589 if (rc == 0) { /* illegal instruction */
590 info.si_signo = SIGILL;
592 info.si_code = TARGET_ILL_ILLOPN;
593 info._sifields._sigfault._addr = env->regs[15];
594 queue_signal(env, info.si_signo, &info);
595 } else if (rc < 0) { /* FP exception */
598 /* translate softfloat flags to FPSR flags */
599 if (-rc & float_flag_invalid)
601 if (-rc & float_flag_divbyzero)
603 if (-rc & float_flag_overflow)
605 if (-rc & float_flag_underflow)
607 if (-rc & float_flag_inexact)
610 FPSR fpsr = ts->fpa.fpsr;
611 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
613 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
614 info.si_signo = SIGFPE;
617 /* ordered by priority, least first */
618 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
619 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
620 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
621 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
622 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
624 info._sifields._sigfault._addr = env->regs[15];
625 queue_signal(env, info.si_signo, &info);
630 /* accumulate unenabled exceptions */
631 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
633 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
635 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
637 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
639 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
642 } else { /* everything OK */
653 if (trapnr == EXCP_BKPT) {
655 /* FIXME - what to do if get_user() fails? */
656 get_user_u16(insn, env->regs[15]);
660 /* FIXME - what to do if get_user() fails? */
661 get_user_u32(insn, env->regs[15]);
662 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
667 /* FIXME - what to do if get_user() fails? */
668 get_user_u16(insn, env->regs[15] - 2);
671 /* FIXME - what to do if get_user() fails? */
672 get_user_u32(insn, env->regs[15] - 4);
677 if (n == ARM_NR_cacheflush) {
678 arm_cache_flush(env->regs[0], env->regs[1]);
679 } else if (n == ARM_NR_semihosting
680 || n == ARM_NR_thumb_semihosting) {
681 env->regs[0] = do_arm_semihosting (env);
682 } else if (n == 0 || n >= ARM_SYSCALL_BASE
683 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
685 if (env->thumb || n == 0) {
688 n -= ARM_SYSCALL_BASE;
691 if ( n > ARM_NR_BASE) {
693 case ARM_NR_cacheflush:
694 arm_cache_flush(env->regs[0], env->regs[1]);
697 cpu_set_tls(env, env->regs[0]);
701 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
703 env->regs[0] = -TARGET_ENOSYS;
707 env->regs[0] = do_syscall(env,
722 /* just indicate that signals should be handled asap */
724 case EXCP_PREFETCH_ABORT:
725 addr = env->cp15.c6_insn;
727 case EXCP_DATA_ABORT:
728 addr = env->cp15.c6_data;
732 info.si_signo = SIGSEGV;
734 /* XXX: check env->error_code */
735 info.si_code = TARGET_SEGV_MAPERR;
736 info._sifields._sigfault._addr = addr;
737 queue_signal(env, info.si_signo, &info);
744 sig = gdb_handlesig (env, TARGET_SIGTRAP);
749 info.si_code = TARGET_TRAP_BRKPT;
750 queue_signal(env, info.si_signo, &info);
754 case EXCP_KERNEL_TRAP:
755 if (do_kernel_trap(env))
760 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
762 cpu_dump_state(env, stderr, fprintf, 0);
765 process_pending_signals(env);
772 #define SPARC64_STACK_BIAS 2047
776 /* WARNING: dealing with register windows _is_ complicated. More info
777 can be found at http://www.sics.se/~psm/sparcstack.html */
778 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
780 index = (index + cwp * 16) % (16 * env->nwindows);
781 /* wrap handling : if cwp is on the last window, then we use the
782 registers 'after' the end */
783 if (index < 8 && env->cwp == env->nwindows - 1)
784 index += 16 * env->nwindows;
788 /* save the register window 'cwp1' */
789 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
794 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
795 #ifdef TARGET_SPARC64
797 sp_ptr += SPARC64_STACK_BIAS;
799 #if defined(DEBUG_WIN)
800 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
803 for(i = 0; i < 16; i++) {
804 /* FIXME - what to do if put_user() fails? */
805 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
806 sp_ptr += sizeof(abi_ulong);
810 static void save_window(CPUSPARCState *env)
812 #ifndef TARGET_SPARC64
813 unsigned int new_wim;
814 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
815 ((1LL << env->nwindows) - 1);
816 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
819 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
825 static void restore_window(CPUSPARCState *env)
827 #ifndef TARGET_SPARC64
828 unsigned int new_wim;
830 unsigned int i, cwp1;
833 #ifndef TARGET_SPARC64
834 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
835 ((1LL << env->nwindows) - 1);
838 /* restore the invalid window */
839 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
840 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
841 #ifdef TARGET_SPARC64
843 sp_ptr += SPARC64_STACK_BIAS;
845 #if defined(DEBUG_WIN)
846 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
849 for(i = 0; i < 16; i++) {
850 /* FIXME - what to do if get_user() fails? */
851 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
852 sp_ptr += sizeof(abi_ulong);
854 #ifdef TARGET_SPARC64
856 if (env->cleanwin < env->nwindows - 1)
864 static void flush_windows(CPUSPARCState *env)
870 /* if restore would invoke restore_window(), then we can stop */
871 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
872 #ifndef TARGET_SPARC64
873 if (env->wim & (1 << cwp1))
876 if (env->canrestore == 0)
881 save_window_offset(env, cwp1);
884 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
885 #ifndef TARGET_SPARC64
886 /* set wim so that restore will reload the registers */
887 env->wim = 1 << cwp1;
889 #if defined(DEBUG_WIN)
890 printf("flush_windows: nb=%d\n", offset - 1);
894 void cpu_loop (CPUSPARCState *env)
897 target_siginfo_t info;
900 trapnr = cpu_sparc_exec (env);
903 #ifndef TARGET_SPARC64
910 ret = do_syscall (env, env->gregs[1],
911 env->regwptr[0], env->regwptr[1],
912 env->regwptr[2], env->regwptr[3],
913 env->regwptr[4], env->regwptr[5]);
914 if ((unsigned int)ret >= (unsigned int)(-515)) {
915 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
916 env->xcc |= PSR_CARRY;
918 env->psr |= PSR_CARRY;
922 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
923 env->xcc &= ~PSR_CARRY;
925 env->psr &= ~PSR_CARRY;
928 env->regwptr[0] = ret;
929 /* next instruction */
931 env->npc = env->npc + 4;
933 case 0x83: /* flush windows */
938 /* next instruction */
940 env->npc = env->npc + 4;
942 #ifndef TARGET_SPARC64
943 case TT_WIN_OVF: /* window overflow */
946 case TT_WIN_UNF: /* window underflow */
952 info.si_signo = SIGSEGV;
954 /* XXX: check env->error_code */
955 info.si_code = TARGET_SEGV_MAPERR;
956 info._sifields._sigfault._addr = env->mmuregs[4];
957 queue_signal(env, info.si_signo, &info);
961 case TT_SPILL: /* window overflow */
964 case TT_FILL: /* window underflow */
970 info.si_signo = SIGSEGV;
972 /* XXX: check env->error_code */
973 info.si_code = TARGET_SEGV_MAPERR;
974 if (trapnr == TT_DFAULT)
975 info._sifields._sigfault._addr = env->dmmuregs[4];
977 info._sifields._sigfault._addr = env->tsptr->tpc;
978 queue_signal(env, info.si_signo, &info);
984 sparc64_get_context(env);
988 sparc64_set_context(env);
993 /* just indicate that signals should be handled asap */
999 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1002 info.si_signo = sig;
1004 info.si_code = TARGET_TRAP_BRKPT;
1005 queue_signal(env, info.si_signo, &info);
1010 printf ("Unhandled trap: 0x%x\n", trapnr);
1011 cpu_dump_state(env, stderr, fprintf, 0);
1014 process_pending_signals (env);
1021 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1027 uint32_t cpu_ppc_load_tbl (CPUState *env)
1029 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1032 uint32_t cpu_ppc_load_tbu (CPUState *env)
1034 return cpu_ppc_get_tb(env) >> 32;
1037 uint32_t cpu_ppc_load_atbl (CPUState *env)
1039 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1042 uint32_t cpu_ppc_load_atbu (CPUState *env)
1044 return cpu_ppc_get_tb(env) >> 32;
1047 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1048 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1050 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1052 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1055 /* XXX: to be fixed */
1056 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1061 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1066 #define EXCP_DUMP(env, fmt, args...) \
1068 fprintf(stderr, fmt , ##args); \
1069 cpu_dump_state(env, stderr, fprintf, 0); \
1070 qemu_log(fmt, ##args); \
1071 log_cpu_state(env, 0); \
1074 void cpu_loop(CPUPPCState *env)
1076 target_siginfo_t info;
1081 trapnr = cpu_ppc_exec(env);
1083 case POWERPC_EXCP_NONE:
1086 case POWERPC_EXCP_CRITICAL: /* Critical input */
1087 cpu_abort(env, "Critical interrupt while in user mode. "
1090 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1091 cpu_abort(env, "Machine check exception while in user mode. "
1094 case POWERPC_EXCP_DSI: /* Data storage exception */
1095 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1097 /* XXX: check this. Seems bugged */
1098 switch (env->error_code & 0xFF000000) {
1100 info.si_signo = TARGET_SIGSEGV;
1102 info.si_code = TARGET_SEGV_MAPERR;
1105 info.si_signo = TARGET_SIGILL;
1107 info.si_code = TARGET_ILL_ILLADR;
1110 info.si_signo = TARGET_SIGSEGV;
1112 info.si_code = TARGET_SEGV_ACCERR;
1115 /* Let's send a regular segfault... */
1116 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1118 info.si_signo = TARGET_SIGSEGV;
1120 info.si_code = TARGET_SEGV_MAPERR;
1123 info._sifields._sigfault._addr = env->nip;
1124 queue_signal(env, info.si_signo, &info);
1126 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1127 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1128 env->spr[SPR_SRR0]);
1129 /* XXX: check this */
1130 switch (env->error_code & 0xFF000000) {
1132 info.si_signo = TARGET_SIGSEGV;
1134 info.si_code = TARGET_SEGV_MAPERR;
1138 info.si_signo = TARGET_SIGSEGV;
1140 info.si_code = TARGET_SEGV_ACCERR;
1143 /* Let's send a regular segfault... */
1144 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1146 info.si_signo = TARGET_SIGSEGV;
1148 info.si_code = TARGET_SEGV_MAPERR;
1151 info._sifields._sigfault._addr = env->nip - 4;
1152 queue_signal(env, info.si_signo, &info);
1154 case POWERPC_EXCP_EXTERNAL: /* External input */
1155 cpu_abort(env, "External interrupt while in user mode. "
1158 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1159 EXCP_DUMP(env, "Unaligned memory access\n");
1160 /* XXX: check this */
1161 info.si_signo = TARGET_SIGBUS;
1163 info.si_code = TARGET_BUS_ADRALN;
1164 info._sifields._sigfault._addr = env->nip - 4;
1165 queue_signal(env, info.si_signo, &info);
1167 case POWERPC_EXCP_PROGRAM: /* Program exception */
1168 /* XXX: check this */
1169 switch (env->error_code & ~0xF) {
1170 case POWERPC_EXCP_FP:
1171 EXCP_DUMP(env, "Floating point program exception\n");
1172 info.si_signo = TARGET_SIGFPE;
1174 switch (env->error_code & 0xF) {
1175 case POWERPC_EXCP_FP_OX:
1176 info.si_code = TARGET_FPE_FLTOVF;
1178 case POWERPC_EXCP_FP_UX:
1179 info.si_code = TARGET_FPE_FLTUND;
1181 case POWERPC_EXCP_FP_ZX:
1182 case POWERPC_EXCP_FP_VXZDZ:
1183 info.si_code = TARGET_FPE_FLTDIV;
1185 case POWERPC_EXCP_FP_XX:
1186 info.si_code = TARGET_FPE_FLTRES;
1188 case POWERPC_EXCP_FP_VXSOFT:
1189 info.si_code = TARGET_FPE_FLTINV;
1191 case POWERPC_EXCP_FP_VXSNAN:
1192 case POWERPC_EXCP_FP_VXISI:
1193 case POWERPC_EXCP_FP_VXIDI:
1194 case POWERPC_EXCP_FP_VXIMZ:
1195 case POWERPC_EXCP_FP_VXVC:
1196 case POWERPC_EXCP_FP_VXSQRT:
1197 case POWERPC_EXCP_FP_VXCVI:
1198 info.si_code = TARGET_FPE_FLTSUB;
1201 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1206 case POWERPC_EXCP_INVAL:
1207 EXCP_DUMP(env, "Invalid instruction\n");
1208 info.si_signo = TARGET_SIGILL;
1210 switch (env->error_code & 0xF) {
1211 case POWERPC_EXCP_INVAL_INVAL:
1212 info.si_code = TARGET_ILL_ILLOPC;
1214 case POWERPC_EXCP_INVAL_LSWX:
1215 info.si_code = TARGET_ILL_ILLOPN;
1217 case POWERPC_EXCP_INVAL_SPR:
1218 info.si_code = TARGET_ILL_PRVREG;
1220 case POWERPC_EXCP_INVAL_FP:
1221 info.si_code = TARGET_ILL_COPROC;
1224 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1225 env->error_code & 0xF);
1226 info.si_code = TARGET_ILL_ILLADR;
1230 case POWERPC_EXCP_PRIV:
1231 EXCP_DUMP(env, "Privilege violation\n");
1232 info.si_signo = TARGET_SIGILL;
1234 switch (env->error_code & 0xF) {
1235 case POWERPC_EXCP_PRIV_OPC:
1236 info.si_code = TARGET_ILL_PRVOPC;
1238 case POWERPC_EXCP_PRIV_REG:
1239 info.si_code = TARGET_ILL_PRVREG;
1242 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1243 env->error_code & 0xF);
1244 info.si_code = TARGET_ILL_PRVOPC;
1248 case POWERPC_EXCP_TRAP:
1249 cpu_abort(env, "Tried to call a TRAP\n");
1252 /* Should not happen ! */
1253 cpu_abort(env, "Unknown program exception (%02x)\n",
1257 info._sifields._sigfault._addr = env->nip - 4;
1258 queue_signal(env, info.si_signo, &info);
1260 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1261 EXCP_DUMP(env, "No floating point allowed\n");
1262 info.si_signo = TARGET_SIGILL;
1264 info.si_code = TARGET_ILL_COPROC;
1265 info._sifields._sigfault._addr = env->nip - 4;
1266 queue_signal(env, info.si_signo, &info);
1268 case POWERPC_EXCP_SYSCALL: /* System call exception */
1269 cpu_abort(env, "Syscall exception while in user mode. "
1272 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1273 EXCP_DUMP(env, "No APU instruction allowed\n");
1274 info.si_signo = TARGET_SIGILL;
1276 info.si_code = TARGET_ILL_COPROC;
1277 info._sifields._sigfault._addr = env->nip - 4;
1278 queue_signal(env, info.si_signo, &info);
1280 case POWERPC_EXCP_DECR: /* Decrementer exception */
1281 cpu_abort(env, "Decrementer interrupt while in user mode. "
1284 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1285 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1288 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1289 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1292 case POWERPC_EXCP_DTLB: /* Data TLB error */
1293 cpu_abort(env, "Data TLB exception while in user mode. "
1296 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1297 cpu_abort(env, "Instruction TLB exception while in user mode. "
1300 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1301 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1302 info.si_signo = TARGET_SIGILL;
1304 info.si_code = TARGET_ILL_COPROC;
1305 info._sifields._sigfault._addr = env->nip - 4;
1306 queue_signal(env, info.si_signo, &info);
1308 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1309 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1311 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1312 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1314 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1315 cpu_abort(env, "Performance monitor exception not handled\n");
1317 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1318 cpu_abort(env, "Doorbell interrupt while in user mode. "
1321 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1322 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1325 case POWERPC_EXCP_RESET: /* System reset exception */
1326 cpu_abort(env, "Reset interrupt while in user mode. "
1329 case POWERPC_EXCP_DSEG: /* Data segment exception */
1330 cpu_abort(env, "Data segment exception while in user mode. "
1333 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1334 cpu_abort(env, "Instruction segment exception "
1335 "while in user mode. Aborting\n");
1337 /* PowerPC 64 with hypervisor mode support */
1338 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1339 cpu_abort(env, "Hypervisor decrementer interrupt "
1340 "while in user mode. Aborting\n");
1342 case POWERPC_EXCP_TRACE: /* Trace exception */
1344 * we use this exception to emulate step-by-step execution mode.
1347 /* PowerPC 64 with hypervisor mode support */
1348 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1349 cpu_abort(env, "Hypervisor data storage exception "
1350 "while in user mode. Aborting\n");
1352 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1353 cpu_abort(env, "Hypervisor instruction storage exception "
1354 "while in user mode. Aborting\n");
1356 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1357 cpu_abort(env, "Hypervisor data segment exception "
1358 "while in user mode. Aborting\n");
1360 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1361 cpu_abort(env, "Hypervisor instruction segment exception "
1362 "while in user mode. Aborting\n");
1364 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1365 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1366 info.si_signo = TARGET_SIGILL;
1368 info.si_code = TARGET_ILL_COPROC;
1369 info._sifields._sigfault._addr = env->nip - 4;
1370 queue_signal(env, info.si_signo, &info);
1372 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1373 cpu_abort(env, "Programable interval timer interrupt "
1374 "while in user mode. Aborting\n");
1376 case POWERPC_EXCP_IO: /* IO error exception */
1377 cpu_abort(env, "IO error exception while in user mode. "
1380 case POWERPC_EXCP_RUNM: /* Run mode exception */
1381 cpu_abort(env, "Run mode exception while in user mode. "
1384 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1385 cpu_abort(env, "Emulation trap exception not handled\n");
1387 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1388 cpu_abort(env, "Instruction fetch TLB exception "
1389 "while in user-mode. Aborting");
1391 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1392 cpu_abort(env, "Data load TLB exception while in user-mode. "
1395 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1396 cpu_abort(env, "Data store TLB exception while in user-mode. "
1399 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1400 cpu_abort(env, "Floating-point assist exception not handled\n");
1402 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1403 cpu_abort(env, "Instruction address breakpoint exception "
1406 case POWERPC_EXCP_SMI: /* System management interrupt */
1407 cpu_abort(env, "System management interrupt while in user mode. "
1410 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1411 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1414 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1415 cpu_abort(env, "Performance monitor exception not handled\n");
1417 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1418 cpu_abort(env, "Vector assist exception not handled\n");
1420 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1421 cpu_abort(env, "Soft patch exception not handled\n");
1423 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1424 cpu_abort(env, "Maintenance exception while in user mode. "
1427 case POWERPC_EXCP_STOP: /* stop translation */
1428 /* We did invalidate the instruction cache. Go on */
1430 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1431 /* We just stopped because of a branch. Go on */
1433 case POWERPC_EXCP_SYSCALL_USER:
1434 /* system call in user-mode emulation */
1436 * PPC ABI uses overflow flag in cr0 to signal an error
1440 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1441 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1443 env->crf[0] &= ~0x1;
1444 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1445 env->gpr[5], env->gpr[6], env->gpr[7],
1447 if (ret > (uint32_t)(-515)) {
1453 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1460 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1462 info.si_signo = sig;
1464 info.si_code = TARGET_TRAP_BRKPT;
1465 queue_signal(env, info.si_signo, &info);
1469 case EXCP_INTERRUPT:
1470 /* just indicate that signals should be handled asap */
1473 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1476 process_pending_signals(env);
1483 #define MIPS_SYS(name, args) args,
1485 static const uint8_t mips_syscall_args[] = {
1486 MIPS_SYS(sys_syscall , 0) /* 4000 */
1487 MIPS_SYS(sys_exit , 1)
1488 MIPS_SYS(sys_fork , 0)
1489 MIPS_SYS(sys_read , 3)
1490 MIPS_SYS(sys_write , 3)
1491 MIPS_SYS(sys_open , 3) /* 4005 */
1492 MIPS_SYS(sys_close , 1)
1493 MIPS_SYS(sys_waitpid , 3)
1494 MIPS_SYS(sys_creat , 2)
1495 MIPS_SYS(sys_link , 2)
1496 MIPS_SYS(sys_unlink , 1) /* 4010 */
1497 MIPS_SYS(sys_execve , 0)
1498 MIPS_SYS(sys_chdir , 1)
1499 MIPS_SYS(sys_time , 1)
1500 MIPS_SYS(sys_mknod , 3)
1501 MIPS_SYS(sys_chmod , 2) /* 4015 */
1502 MIPS_SYS(sys_lchown , 3)
1503 MIPS_SYS(sys_ni_syscall , 0)
1504 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1505 MIPS_SYS(sys_lseek , 3)
1506 MIPS_SYS(sys_getpid , 0) /* 4020 */
1507 MIPS_SYS(sys_mount , 5)
1508 MIPS_SYS(sys_oldumount , 1)
1509 MIPS_SYS(sys_setuid , 1)
1510 MIPS_SYS(sys_getuid , 0)
1511 MIPS_SYS(sys_stime , 1) /* 4025 */
1512 MIPS_SYS(sys_ptrace , 4)
1513 MIPS_SYS(sys_alarm , 1)
1514 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1515 MIPS_SYS(sys_pause , 0)
1516 MIPS_SYS(sys_utime , 2) /* 4030 */
1517 MIPS_SYS(sys_ni_syscall , 0)
1518 MIPS_SYS(sys_ni_syscall , 0)
1519 MIPS_SYS(sys_access , 2)
1520 MIPS_SYS(sys_nice , 1)
1521 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1522 MIPS_SYS(sys_sync , 0)
1523 MIPS_SYS(sys_kill , 2)
1524 MIPS_SYS(sys_rename , 2)
1525 MIPS_SYS(sys_mkdir , 2)
1526 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1527 MIPS_SYS(sys_dup , 1)
1528 MIPS_SYS(sys_pipe , 0)
1529 MIPS_SYS(sys_times , 1)
1530 MIPS_SYS(sys_ni_syscall , 0)
1531 MIPS_SYS(sys_brk , 1) /* 4045 */
1532 MIPS_SYS(sys_setgid , 1)
1533 MIPS_SYS(sys_getgid , 0)
1534 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1535 MIPS_SYS(sys_geteuid , 0)
1536 MIPS_SYS(sys_getegid , 0) /* 4050 */
1537 MIPS_SYS(sys_acct , 0)
1538 MIPS_SYS(sys_umount , 2)
1539 MIPS_SYS(sys_ni_syscall , 0)
1540 MIPS_SYS(sys_ioctl , 3)
1541 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1542 MIPS_SYS(sys_ni_syscall , 2)
1543 MIPS_SYS(sys_setpgid , 2)
1544 MIPS_SYS(sys_ni_syscall , 0)
1545 MIPS_SYS(sys_olduname , 1)
1546 MIPS_SYS(sys_umask , 1) /* 4060 */
1547 MIPS_SYS(sys_chroot , 1)
1548 MIPS_SYS(sys_ustat , 2)
1549 MIPS_SYS(sys_dup2 , 2)
1550 MIPS_SYS(sys_getppid , 0)
1551 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1552 MIPS_SYS(sys_setsid , 0)
1553 MIPS_SYS(sys_sigaction , 3)
1554 MIPS_SYS(sys_sgetmask , 0)
1555 MIPS_SYS(sys_ssetmask , 1)
1556 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1557 MIPS_SYS(sys_setregid , 2)
1558 MIPS_SYS(sys_sigsuspend , 0)
1559 MIPS_SYS(sys_sigpending , 1)
1560 MIPS_SYS(sys_sethostname , 2)
1561 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1562 MIPS_SYS(sys_getrlimit , 2)
1563 MIPS_SYS(sys_getrusage , 2)
1564 MIPS_SYS(sys_gettimeofday, 2)
1565 MIPS_SYS(sys_settimeofday, 2)
1566 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1567 MIPS_SYS(sys_setgroups , 2)
1568 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1569 MIPS_SYS(sys_symlink , 2)
1570 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1571 MIPS_SYS(sys_readlink , 3) /* 4085 */
1572 MIPS_SYS(sys_uselib , 1)
1573 MIPS_SYS(sys_swapon , 2)
1574 MIPS_SYS(sys_reboot , 3)
1575 MIPS_SYS(old_readdir , 3)
1576 MIPS_SYS(old_mmap , 6) /* 4090 */
1577 MIPS_SYS(sys_munmap , 2)
1578 MIPS_SYS(sys_truncate , 2)
1579 MIPS_SYS(sys_ftruncate , 2)
1580 MIPS_SYS(sys_fchmod , 2)
1581 MIPS_SYS(sys_fchown , 3) /* 4095 */
1582 MIPS_SYS(sys_getpriority , 2)
1583 MIPS_SYS(sys_setpriority , 3)
1584 MIPS_SYS(sys_ni_syscall , 0)
1585 MIPS_SYS(sys_statfs , 2)
1586 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1587 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1588 MIPS_SYS(sys_socketcall , 2)
1589 MIPS_SYS(sys_syslog , 3)
1590 MIPS_SYS(sys_setitimer , 3)
1591 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1592 MIPS_SYS(sys_newstat , 2)
1593 MIPS_SYS(sys_newlstat , 2)
1594 MIPS_SYS(sys_newfstat , 2)
1595 MIPS_SYS(sys_uname , 1)
1596 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1597 MIPS_SYS(sys_vhangup , 0)
1598 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1599 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1600 MIPS_SYS(sys_wait4 , 4)
1601 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1602 MIPS_SYS(sys_sysinfo , 1)
1603 MIPS_SYS(sys_ipc , 6)
1604 MIPS_SYS(sys_fsync , 1)
1605 MIPS_SYS(sys_sigreturn , 0)
1606 MIPS_SYS(sys_clone , 0) /* 4120 */
1607 MIPS_SYS(sys_setdomainname, 2)
1608 MIPS_SYS(sys_newuname , 1)
1609 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1610 MIPS_SYS(sys_adjtimex , 1)
1611 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1612 MIPS_SYS(sys_sigprocmask , 3)
1613 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1614 MIPS_SYS(sys_init_module , 5)
1615 MIPS_SYS(sys_delete_module, 1)
1616 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1617 MIPS_SYS(sys_quotactl , 0)
1618 MIPS_SYS(sys_getpgid , 1)
1619 MIPS_SYS(sys_fchdir , 1)
1620 MIPS_SYS(sys_bdflush , 2)
1621 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1622 MIPS_SYS(sys_personality , 1)
1623 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1624 MIPS_SYS(sys_setfsuid , 1)
1625 MIPS_SYS(sys_setfsgid , 1)
1626 MIPS_SYS(sys_llseek , 5) /* 4140 */
1627 MIPS_SYS(sys_getdents , 3)
1628 MIPS_SYS(sys_select , 5)
1629 MIPS_SYS(sys_flock , 2)
1630 MIPS_SYS(sys_msync , 3)
1631 MIPS_SYS(sys_readv , 3) /* 4145 */
1632 MIPS_SYS(sys_writev , 3)
1633 MIPS_SYS(sys_cacheflush , 3)
1634 MIPS_SYS(sys_cachectl , 3)
1635 MIPS_SYS(sys_sysmips , 4)
1636 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1637 MIPS_SYS(sys_getsid , 1)
1638 MIPS_SYS(sys_fdatasync , 0)
1639 MIPS_SYS(sys_sysctl , 1)
1640 MIPS_SYS(sys_mlock , 2)
1641 MIPS_SYS(sys_munlock , 2) /* 4155 */
1642 MIPS_SYS(sys_mlockall , 1)
1643 MIPS_SYS(sys_munlockall , 0)
1644 MIPS_SYS(sys_sched_setparam, 2)
1645 MIPS_SYS(sys_sched_getparam, 2)
1646 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1647 MIPS_SYS(sys_sched_getscheduler, 1)
1648 MIPS_SYS(sys_sched_yield , 0)
1649 MIPS_SYS(sys_sched_get_priority_max, 1)
1650 MIPS_SYS(sys_sched_get_priority_min, 1)
1651 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1652 MIPS_SYS(sys_nanosleep, 2)
1653 MIPS_SYS(sys_mremap , 4)
1654 MIPS_SYS(sys_accept , 3)
1655 MIPS_SYS(sys_bind , 3)
1656 MIPS_SYS(sys_connect , 3) /* 4170 */
1657 MIPS_SYS(sys_getpeername , 3)
1658 MIPS_SYS(sys_getsockname , 3)
1659 MIPS_SYS(sys_getsockopt , 5)
1660 MIPS_SYS(sys_listen , 2)
1661 MIPS_SYS(sys_recv , 4) /* 4175 */
1662 MIPS_SYS(sys_recvfrom , 6)
1663 MIPS_SYS(sys_recvmsg , 3)
1664 MIPS_SYS(sys_send , 4)
1665 MIPS_SYS(sys_sendmsg , 3)
1666 MIPS_SYS(sys_sendto , 6) /* 4180 */
1667 MIPS_SYS(sys_setsockopt , 5)
1668 MIPS_SYS(sys_shutdown , 2)
1669 MIPS_SYS(sys_socket , 3)
1670 MIPS_SYS(sys_socketpair , 4)
1671 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1672 MIPS_SYS(sys_getresuid , 3)
1673 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1674 MIPS_SYS(sys_poll , 3)
1675 MIPS_SYS(sys_nfsservctl , 3)
1676 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1677 MIPS_SYS(sys_getresgid , 3)
1678 MIPS_SYS(sys_prctl , 5)
1679 MIPS_SYS(sys_rt_sigreturn, 0)
1680 MIPS_SYS(sys_rt_sigaction, 4)
1681 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1682 MIPS_SYS(sys_rt_sigpending, 2)
1683 MIPS_SYS(sys_rt_sigtimedwait, 4)
1684 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1685 MIPS_SYS(sys_rt_sigsuspend, 0)
1686 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1687 MIPS_SYS(sys_pwrite64 , 6)
1688 MIPS_SYS(sys_chown , 3)
1689 MIPS_SYS(sys_getcwd , 2)
1690 MIPS_SYS(sys_capget , 2)
1691 MIPS_SYS(sys_capset , 2) /* 4205 */
1692 MIPS_SYS(sys_sigaltstack , 0)
1693 MIPS_SYS(sys_sendfile , 4)
1694 MIPS_SYS(sys_ni_syscall , 0)
1695 MIPS_SYS(sys_ni_syscall , 0)
1696 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1697 MIPS_SYS(sys_truncate64 , 4)
1698 MIPS_SYS(sys_ftruncate64 , 4)
1699 MIPS_SYS(sys_stat64 , 2)
1700 MIPS_SYS(sys_lstat64 , 2)
1701 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1702 MIPS_SYS(sys_pivot_root , 2)
1703 MIPS_SYS(sys_mincore , 3)
1704 MIPS_SYS(sys_madvise , 3)
1705 MIPS_SYS(sys_getdents64 , 3)
1706 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1707 MIPS_SYS(sys_ni_syscall , 0)
1708 MIPS_SYS(sys_gettid , 0)
1709 MIPS_SYS(sys_readahead , 5)
1710 MIPS_SYS(sys_setxattr , 5)
1711 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1712 MIPS_SYS(sys_fsetxattr , 5)
1713 MIPS_SYS(sys_getxattr , 4)
1714 MIPS_SYS(sys_lgetxattr , 4)
1715 MIPS_SYS(sys_fgetxattr , 4)
1716 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1717 MIPS_SYS(sys_llistxattr , 3)
1718 MIPS_SYS(sys_flistxattr , 3)
1719 MIPS_SYS(sys_removexattr , 2)
1720 MIPS_SYS(sys_lremovexattr, 2)
1721 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1722 MIPS_SYS(sys_tkill , 2)
1723 MIPS_SYS(sys_sendfile64 , 5)
1724 MIPS_SYS(sys_futex , 2)
1725 MIPS_SYS(sys_sched_setaffinity, 3)
1726 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1727 MIPS_SYS(sys_io_setup , 2)
1728 MIPS_SYS(sys_io_destroy , 1)
1729 MIPS_SYS(sys_io_getevents, 5)
1730 MIPS_SYS(sys_io_submit , 3)
1731 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1732 MIPS_SYS(sys_exit_group , 1)
1733 MIPS_SYS(sys_lookup_dcookie, 3)
1734 MIPS_SYS(sys_epoll_create, 1)
1735 MIPS_SYS(sys_epoll_ctl , 4)
1736 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1737 MIPS_SYS(sys_remap_file_pages, 5)
1738 MIPS_SYS(sys_set_tid_address, 1)
1739 MIPS_SYS(sys_restart_syscall, 0)
1740 MIPS_SYS(sys_fadvise64_64, 7)
1741 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1742 MIPS_SYS(sys_fstatfs64 , 2)
1743 MIPS_SYS(sys_timer_create, 3)
1744 MIPS_SYS(sys_timer_settime, 4)
1745 MIPS_SYS(sys_timer_gettime, 2)
1746 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1747 MIPS_SYS(sys_timer_delete, 1)
1748 MIPS_SYS(sys_clock_settime, 2)
1749 MIPS_SYS(sys_clock_gettime, 2)
1750 MIPS_SYS(sys_clock_getres, 2)
1751 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1752 MIPS_SYS(sys_tgkill , 3)
1753 MIPS_SYS(sys_utimes , 2)
1754 MIPS_SYS(sys_mbind , 4)
1755 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1756 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1757 MIPS_SYS(sys_mq_open , 4)
1758 MIPS_SYS(sys_mq_unlink , 1)
1759 MIPS_SYS(sys_mq_timedsend, 5)
1760 MIPS_SYS(sys_mq_timedreceive, 5)
1761 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1762 MIPS_SYS(sys_mq_getsetattr, 3)
1763 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1764 MIPS_SYS(sys_waitid , 4)
1765 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1766 MIPS_SYS(sys_add_key , 5)
1767 MIPS_SYS(sys_request_key, 4)
1768 MIPS_SYS(sys_keyctl , 5)
1769 MIPS_SYS(sys_set_thread_area, 1)
1770 MIPS_SYS(sys_inotify_init, 0)
1771 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1772 MIPS_SYS(sys_inotify_rm_watch, 2)
1773 MIPS_SYS(sys_migrate_pages, 4)
1774 MIPS_SYS(sys_openat, 4)
1775 MIPS_SYS(sys_mkdirat, 3)
1776 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1777 MIPS_SYS(sys_fchownat, 5)
1778 MIPS_SYS(sys_futimesat, 3)
1779 MIPS_SYS(sys_fstatat64, 4)
1780 MIPS_SYS(sys_unlinkat, 3)
1781 MIPS_SYS(sys_renameat, 4) /* 4295 */
1782 MIPS_SYS(sys_linkat, 5)
1783 MIPS_SYS(sys_symlinkat, 3)
1784 MIPS_SYS(sys_readlinkat, 4)
1785 MIPS_SYS(sys_fchmodat, 3)
1786 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1787 MIPS_SYS(sys_pselect6, 6)
1788 MIPS_SYS(sys_ppoll, 5)
1789 MIPS_SYS(sys_unshare, 1)
1790 MIPS_SYS(sys_splice, 4)
1791 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1792 MIPS_SYS(sys_tee, 4)
1793 MIPS_SYS(sys_vmsplice, 4)
1794 MIPS_SYS(sys_move_pages, 6)
1795 MIPS_SYS(sys_set_robust_list, 2)
1796 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1797 MIPS_SYS(sys_kexec_load, 4)
1798 MIPS_SYS(sys_getcpu, 3)
1799 MIPS_SYS(sys_epoll_pwait, 6)
1800 MIPS_SYS(sys_ioprio_set, 3)
1801 MIPS_SYS(sys_ioprio_get, 2)
1806 void cpu_loop(CPUMIPSState *env)
1808 target_siginfo_t info;
1810 unsigned int syscall_num;
1813 trapnr = cpu_mips_exec(env);
1816 syscall_num = env->active_tc.gpr[2] - 4000;
1817 env->active_tc.PC += 4;
1818 if (syscall_num >= sizeof(mips_syscall_args)) {
1823 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1825 nb_args = mips_syscall_args[syscall_num];
1826 sp_reg = env->active_tc.gpr[29];
1828 /* these arguments are taken from the stack */
1829 /* FIXME - what to do if get_user() fails? */
1830 case 8: get_user_ual(arg8, sp_reg + 28);
1831 case 7: get_user_ual(arg7, sp_reg + 24);
1832 case 6: get_user_ual(arg6, sp_reg + 20);
1833 case 5: get_user_ual(arg5, sp_reg + 16);
1837 ret = do_syscall(env, env->active_tc.gpr[2],
1838 env->active_tc.gpr[4],
1839 env->active_tc.gpr[5],
1840 env->active_tc.gpr[6],
1841 env->active_tc.gpr[7],
1842 arg5, arg6/*, arg7, arg8*/);
1844 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1845 env->active_tc.gpr[7] = 1; /* error flag */
1848 env->active_tc.gpr[7] = 0; /* error flag */
1850 env->active_tc.gpr[2] = ret;
1856 info.si_signo = TARGET_SIGILL;
1859 queue_signal(env, info.si_signo, &info);
1861 case EXCP_INTERRUPT:
1862 /* just indicate that signals should be handled asap */
1868 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1871 info.si_signo = sig;
1873 info.si_code = TARGET_TRAP_BRKPT;
1874 queue_signal(env, info.si_signo, &info);
1880 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1882 cpu_dump_state(env, stderr, fprintf, 0);
1885 process_pending_signals(env);
1891 void cpu_loop (CPUState *env)
1894 target_siginfo_t info;
1897 trapnr = cpu_sh4_exec (env);
1902 ret = do_syscall(env,
1910 env->gregs[0] = ret;
1912 case EXCP_INTERRUPT:
1913 /* just indicate that signals should be handled asap */
1919 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1922 info.si_signo = sig;
1924 info.si_code = TARGET_TRAP_BRKPT;
1925 queue_signal(env, info.si_signo, &info);
1931 info.si_signo = SIGSEGV;
1933 info.si_code = TARGET_SEGV_MAPERR;
1934 info._sifields._sigfault._addr = env->tea;
1935 queue_signal(env, info.si_signo, &info);
1939 printf ("Unhandled trap: 0x%x\n", trapnr);
1940 cpu_dump_state(env, stderr, fprintf, 0);
1943 process_pending_signals (env);
1949 void cpu_loop (CPUState *env)
1952 target_siginfo_t info;
1955 trapnr = cpu_cris_exec (env);
1959 info.si_signo = SIGSEGV;
1961 /* XXX: check env->error_code */
1962 info.si_code = TARGET_SEGV_MAPERR;
1963 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1964 queue_signal(env, info.si_signo, &info);
1967 case EXCP_INTERRUPT:
1968 /* just indicate that signals should be handled asap */
1971 ret = do_syscall(env,
1979 env->regs[10] = ret;
1985 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1988 info.si_signo = sig;
1990 info.si_code = TARGET_TRAP_BRKPT;
1991 queue_signal(env, info.si_signo, &info);
1996 printf ("Unhandled trap: 0x%x\n", trapnr);
1997 cpu_dump_state(env, stderr, fprintf, 0);
2000 process_pending_signals (env);
2007 void cpu_loop(CPUM68KState *env)
2011 target_siginfo_t info;
2012 TaskState *ts = env->opaque;
2015 trapnr = cpu_m68k_exec(env);
2019 if (ts->sim_syscalls) {
2021 nr = lduw(env->pc + 2);
2023 do_m68k_simcall(env, nr);
2029 case EXCP_HALT_INSN:
2030 /* Semihosing syscall. */
2032 do_m68k_semihosting(env, env->dregs[0]);
2036 case EXCP_UNSUPPORTED:
2038 info.si_signo = SIGILL;
2040 info.si_code = TARGET_ILL_ILLOPN;
2041 info._sifields._sigfault._addr = env->pc;
2042 queue_signal(env, info.si_signo, &info);
2046 ts->sim_syscalls = 0;
2049 env->dregs[0] = do_syscall(env,
2059 case EXCP_INTERRUPT:
2060 /* just indicate that signals should be handled asap */
2064 info.si_signo = SIGSEGV;
2066 /* XXX: check env->error_code */
2067 info.si_code = TARGET_SEGV_MAPERR;
2068 info._sifields._sigfault._addr = env->mmu.ar;
2069 queue_signal(env, info.si_signo, &info);
2076 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2079 info.si_signo = sig;
2081 info.si_code = TARGET_TRAP_BRKPT;
2082 queue_signal(env, info.si_signo, &info);
2087 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2089 cpu_dump_state(env, stderr, fprintf, 0);
2092 process_pending_signals(env);
2095 #endif /* TARGET_M68K */
2098 void cpu_loop (CPUState *env)
2101 target_siginfo_t info;
2104 trapnr = cpu_alpha_exec (env);
2108 fprintf(stderr, "Reset requested. Exit\n");
2112 fprintf(stderr, "Machine check exception. Exit\n");
2116 fprintf(stderr, "Arithmetic trap.\n");
2119 case EXCP_HW_INTERRUPT:
2120 fprintf(stderr, "External interrupt. Exit\n");
2124 fprintf(stderr, "MMU data fault\n");
2127 case EXCP_DTB_MISS_PAL:
2128 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2132 fprintf(stderr, "MMU instruction TLB miss\n");
2136 fprintf(stderr, "MMU instruction access violation\n");
2139 case EXCP_DTB_MISS_NATIVE:
2140 fprintf(stderr, "MMU data TLB miss\n");
2144 fprintf(stderr, "Unaligned access\n");
2148 fprintf(stderr, "Invalid instruction\n");
2152 fprintf(stderr, "Floating-point not allowed\n");
2155 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2156 call_pal(env, (trapnr >> 6) | 0x80);
2158 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2159 fprintf(stderr, "Privileged call to PALcode\n");
2166 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2169 info.si_signo = sig;
2171 info.si_code = TARGET_TRAP_BRKPT;
2172 queue_signal(env, info.si_signo, &info);
2177 printf ("Unhandled trap: 0x%x\n", trapnr);
2178 cpu_dump_state(env, stderr, fprintf, 0);
2181 process_pending_signals (env);
2184 #endif /* TARGET_ALPHA */
2186 static void usage(void)
2188 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2189 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2190 "Linux CPU emulator (compiled for %s emulation)\n"
2192 "Standard options:\n"
2193 "-h print this help\n"
2194 "-g port wait gdb connection to port\n"
2195 "-L path set the elf interpreter prefix (default=%s)\n"
2196 "-s size set the stack size in bytes (default=%ld)\n"
2197 "-cpu model select CPU (-cpu ? for list)\n"
2198 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2199 "-E var=value sets/modifies targets environment variable(s)\n"
2200 "-U var unsets targets environment variable(s)\n"
2201 "-0 argv0 forces target process argv[0] to be argv0\n"
2202 #if defined(CONFIG_USE_GUEST_BASE)
2203 "-B address set guest_base address to address\n"
2207 "-d options activate log (logfile=%s)\n"
2208 "-p pagesize set the host page size to 'pagesize'\n"
2209 "-strace log system calls\n"
2211 "Environment variables:\n"
2212 "QEMU_STRACE Print system calls and arguments similar to the\n"
2213 " 'strace' program. Enable by setting to any value.\n"
2215 "You can use -E and -U options to set/unset environment variables\n"
2216 "for target process. It is possible to provide several variables\n"
2217 "by repeating the option. For example:\n"
2218 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2219 "Note that if you provide several changes to single variable\n"
2220 "last change will stay in effect.\n"
2221 #if defined(CONFIG_USE_GUEST_BASE)
2223 "You can use -B option to load target binary into different\n"
2224 "address that is specified in elf headers. This can be useful\n"
2225 "when target binary would be loaded to low addresses and\n"
2226 "/proc/sys/vm/mmap_min_addr is set to higher. For example\n"
2227 " qemu-" TARGET_ARCH " -B 0x100000 ...\n"
2228 "loads target binary starting from the first meg.\n"
2238 THREAD CPUState *thread_env;
2240 /* Assumes contents are already zeroed. */
2241 void init_task_state(TaskState *ts)
2246 ts->first_free = ts->sigqueue_table;
2247 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2248 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2250 ts->sigqueue_table[i].next = NULL;
2253 int main(int argc, char **argv, char **envp)
2255 const char *filename = NULL;
2256 const char *cpu_model;
2257 struct target_pt_regs regs1, *regs = ®s1;
2258 struct image_info info1, *info = &info1;
2259 TaskState ts1, *ts = &ts1;
2263 int gdbstub_port = 0;
2264 char **target_environ, **wrk;
2267 int drop_ld_preload = 0;
2268 envlist_t *envlist = NULL;
2269 const char *argv0 = NULL;
2275 qemu_cache_utils_init(envp);
2278 cpu_set_log_filename(DEBUG_LOGFILE);
2280 if ((envlist = envlist_create()) == NULL) {
2281 (void) fprintf(stderr, "Unable to allocate envlist\n");
2285 /* add current environment into the list */
2286 for (wrk = environ; *wrk != NULL; wrk++) {
2287 (void) envlist_setenv(envlist, *wrk);
2300 if (!strcmp(r, "-")) {
2302 } else if (!strcmp(r, "d")) {
2304 const CPULogItem *item;
2310 mask = cpu_str_to_log_mask(r);
2312 printf("Log items (comma separated):\n");
2313 for(item = cpu_log_items; item->mask != 0; item++) {
2314 printf("%-10s %s\n", item->name, item->help);
2319 } else if (!strcmp(r, "E")) {
2321 if (envlist_setenv(envlist, r) != 0)
2323 } else if (!strcmp(r, "U")) {
2325 if (envlist_unsetenv(envlist, r) != 0)
2327 } else if (!strcmp(r, "0")) {
2330 } else if (!strcmp(r,"-sbox-call")) {
2334 } else if (!strcmp(r, "s")) {
2338 x86_stack_size = strtol(r, (char **)&r, 0);
2339 if (x86_stack_size <= 0)
2342 x86_stack_size *= 1024 * 1024;
2343 else if (*r == 'k' || *r == 'K')
2344 x86_stack_size *= 1024;
2345 } else if (!strcmp(r, "L")) {
2346 interp_prefix = argv[optind++];
2347 } else if (!strcmp(r, "p")) {
2350 qemu_host_page_size = atoi(argv[optind++]);
2351 if (qemu_host_page_size == 0 ||
2352 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2353 fprintf(stderr, "page size must be a power of two\n");
2356 } else if (!strcmp(r, "g")) {
2359 gdbstub_port = atoi(argv[optind++]);
2360 } else if (!strcmp(r, "r")) {
2361 qemu_uname_release = argv[optind++];
2362 } else if (!strcmp(r, "cpu")) {
2363 cpu_model = argv[optind++];
2364 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2365 /* XXX: implement xxx_cpu_list for targets that still miss it */
2366 #if defined(cpu_list)
2367 cpu_list(stdout, &fprintf);
2371 #if defined(CONFIG_USE_GUEST_BASE)
2372 } else if (!strcmp(r, "B")) {
2373 guest_base = strtol(argv[optind++], NULL, 0);
2375 } else if (!strcmp(r, "drop-ld-preload")) {
2376 drop_ld_preload = 1;
2377 } else if (!strcmp(r, "keep-ld-preload")) {
2378 drop_ld_preload = 0;
2379 } else if (!strcmp(r, "strace")) {
2388 if (filename == NULL) {
2389 filename = argv[optind];
2390 exec_path = argv[optind];
2392 argv0 = argv[optind];
2394 if (drop_ld_preload) {
2395 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2399 memset(regs, 0, sizeof(struct target_pt_regs));
2401 /* Zero out image_info */
2402 memset(info, 0, sizeof(struct image_info));
2404 /* Scan interp_prefix dir for replacement files. */
2405 init_paths(interp_prefix);
2407 if (cpu_model == NULL) {
2408 #if defined(TARGET_I386)
2409 #ifdef TARGET_X86_64
2410 cpu_model = "qemu64";
2412 cpu_model = "qemu32";
2414 #elif defined(TARGET_ARM)
2416 #elif defined(TARGET_M68K)
2418 #elif defined(TARGET_SPARC)
2419 #ifdef TARGET_SPARC64
2420 cpu_model = "TI UltraSparc II";
2422 cpu_model = "Fujitsu MB86904";
2424 #elif defined(TARGET_MIPS)
2425 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2430 #elif defined(TARGET_PPC)
2440 cpu_exec_init_all(0);
2441 /* NOTE: we need to init the CPU at this stage to get
2442 qemu_host_page_size */
2443 env = cpu_init(cpu_model);
2445 fprintf(stderr, "Unable to find CPU definition\n");
2450 if (getenv("QEMU_STRACE")) {
2454 target_environ = envlist_to_environ(envlist, NULL);
2455 envlist_free(envlist);
2457 #if defined(CONFIG_USE_GUEST_BASE)
2459 * Now that page sizes are configured in cpu_init() we can do
2460 * proper page alignment for guest_base.
2462 guest_base = HOST_PAGE_ALIGN(guest_base);
2465 * Read in mmap_min_addr kernel parameter and check
2466 * whether it is set to some value > 0. This value is used
2467 * later on when doing mmap(2)s to calculate where guest_base
2468 * is to set, if needed.
2470 * When user has explicitly set the quest base, we skip this
2473 if (guest_base == 0) {
2476 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
2478 if (fscanf(fp, "%lu", &tmp) == 1) {
2479 mmap_min_addr = tmp;
2480 qemu_log("kernel mmap_min_addr=%lu\n", mmap_min_addr);
2485 #endif /* CONFIG_USE_GUEST_BASE */
2488 * Prepare copy of argv vector for target.
2490 target_argc = argc - optind;
2491 target_argv = calloc(target_argc + 1, sizeof (char *));
2492 if (target_argv == NULL) {
2493 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2498 * If argv0 is specified (using '-0' switch) we replace
2499 * argv[0] pointer with the given one.
2502 if (argv0 != NULL) {
2503 target_argv[i++] = strdup(argv0);
2505 for (; i < target_argc; i++) {
2506 target_argv[i] = strdup(argv[optind + i]);
2508 target_argv[target_argc] = NULL;
2510 if (loader_exec(filename, target_argv, target_environ, regs, info) != 0) {
2511 printf("Error loading %s\n", filename);
2515 for (i = 0; i < target_argc; i++) {
2516 free(target_argv[i]);
2520 for (wrk = target_environ; *wrk; wrk++) {
2524 free(target_environ);
2526 if (qemu_log_enabled()) {
2527 #if defined(CONFIG_USE_GUEST_BASE)
2528 if (guest_base > 0) {
2529 qemu_log("guest_base is set to 0x%lx\n", guest_base);
2531 "==========================================================\n"
2532 "Note that all target addresses below are given in target\n"
2533 "address space which is different from host by guest_base.\n"
2534 "For example: target address 0x%x becomes 0x%x and so on.\n"
2535 "==========================================================\n",
2536 (uintptr_t)0x8000, (uintptr_t)g2h(0x8000));
2541 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2542 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2543 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2545 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2547 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2548 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2550 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2551 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2554 target_set_brk(info->brk);
2558 /* build Task State */
2559 memset(ts, 0, sizeof(TaskState));
2560 init_task_state(ts);
2564 #if defined(TARGET_I386)
2565 cpu_x86_set_cpl(env, 3);
2567 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2568 env->hflags |= HF_PE_MASK;
2569 if (env->cpuid_features & CPUID_SSE) {
2570 env->cr[4] |= CR4_OSFXSR_MASK;
2571 env->hflags |= HF_OSFXSR_MASK;
2573 #ifndef TARGET_ABI32
2574 /* enable 64 bit mode if possible */
2575 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2576 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2579 env->cr[4] |= CR4_PAE_MASK;
2580 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2581 env->hflags |= HF_LMA_MASK;
2584 /* flags setup : we activate the IRQs by default as in user mode */
2585 env->eflags |= IF_MASK;
2587 /* linux register setup */
2588 #ifndef TARGET_ABI32
2589 env->regs[R_EAX] = regs->rax;
2590 env->regs[R_EBX] = regs->rbx;
2591 env->regs[R_ECX] = regs->rcx;
2592 env->regs[R_EDX] = regs->rdx;
2593 env->regs[R_ESI] = regs->rsi;
2594 env->regs[R_EDI] = regs->rdi;
2595 env->regs[R_EBP] = regs->rbp;
2596 env->regs[R_ESP] = regs->rsp;
2597 env->eip = regs->rip;
2599 env->regs[R_EAX] = regs->eax;
2600 env->regs[R_EBX] = regs->ebx;
2601 env->regs[R_ECX] = regs->ecx;
2602 env->regs[R_EDX] = regs->edx;
2603 env->regs[R_ESI] = regs->esi;
2604 env->regs[R_EDI] = regs->edi;
2605 env->regs[R_EBP] = regs->ebp;
2606 env->regs[R_ESP] = regs->esp;
2607 env->eip = regs->eip;
2610 /* linux interrupt setup */
2611 #ifndef TARGET_ABI32
2612 env->idt.limit = 511;
2614 env->idt.limit = 255;
2616 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2617 PROT_READ|PROT_WRITE,
2618 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2619 idt_table = g2h(env->idt.base);
2642 /* linux segment setup */
2644 uint64_t *gdt_table;
2645 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2646 PROT_READ|PROT_WRITE,
2647 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2648 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2649 gdt_table = g2h(env->gdt.base);
2651 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2652 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2653 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2655 /* 64 bit code segment */
2656 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2657 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2659 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2661 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2662 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2663 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2665 cpu_x86_load_seg(env, R_CS, __USER_CS);
2666 cpu_x86_load_seg(env, R_SS, __USER_DS);
2668 cpu_x86_load_seg(env, R_DS, __USER_DS);
2669 cpu_x86_load_seg(env, R_ES, __USER_DS);
2670 cpu_x86_load_seg(env, R_FS, __USER_DS);
2671 cpu_x86_load_seg(env, R_GS, __USER_DS);
2672 /* This hack makes Wine work... */
2673 env->segs[R_FS].selector = 0;
2675 cpu_x86_load_seg(env, R_DS, 0);
2676 cpu_x86_load_seg(env, R_ES, 0);
2677 cpu_x86_load_seg(env, R_FS, 0);
2678 cpu_x86_load_seg(env, R_GS, 0);
2680 #elif defined(TARGET_ARM)
2683 cpsr_write(env, regs->uregs[16], 0xffffffff);
2684 for(i = 0; i < 16; i++) {
2685 env->regs[i] = regs->uregs[i];
2688 #elif defined(TARGET_SPARC)
2692 env->npc = regs->npc;
2694 for(i = 0; i < 8; i++)
2695 env->gregs[i] = regs->u_regs[i];
2696 for(i = 0; i < 8; i++)
2697 env->regwptr[i] = regs->u_regs[i + 8];
2699 #elif defined(TARGET_PPC)
2703 #if defined(TARGET_PPC64)
2704 #if defined(TARGET_ABI32)
2705 env->msr &= ~((target_ulong)1 << MSR_SF);
2707 env->msr |= (target_ulong)1 << MSR_SF;
2710 env->nip = regs->nip;
2711 for(i = 0; i < 32; i++) {
2712 env->gpr[i] = regs->gpr[i];
2715 #elif defined(TARGET_M68K)
2718 env->dregs[0] = regs->d0;
2719 env->dregs[1] = regs->d1;
2720 env->dregs[2] = regs->d2;
2721 env->dregs[3] = regs->d3;
2722 env->dregs[4] = regs->d4;
2723 env->dregs[5] = regs->d5;
2724 env->dregs[6] = regs->d6;
2725 env->dregs[7] = regs->d7;
2726 env->aregs[0] = regs->a0;
2727 env->aregs[1] = regs->a1;
2728 env->aregs[2] = regs->a2;
2729 env->aregs[3] = regs->a3;
2730 env->aregs[4] = regs->a4;
2731 env->aregs[5] = regs->a5;
2732 env->aregs[6] = regs->a6;
2733 env->aregs[7] = regs->usp;
2735 ts->sim_syscalls = 1;
2737 #elif defined(TARGET_MIPS)
2741 for(i = 0; i < 32; i++) {
2742 env->active_tc.gpr[i] = regs->regs[i];
2744 env->active_tc.PC = regs->cp0_epc;
2746 #elif defined(TARGET_SH4)
2750 for(i = 0; i < 16; i++) {
2751 env->gregs[i] = regs->regs[i];
2755 #elif defined(TARGET_ALPHA)
2759 for(i = 0; i < 28; i++) {
2760 env->ir[i] = ((abi_ulong *)regs)[i];
2762 env->ipr[IPR_USP] = regs->usp;
2763 env->ir[30] = regs->usp;
2765 env->unique = regs->unique;
2767 #elif defined(TARGET_CRIS)
2769 env->regs[0] = regs->r0;
2770 env->regs[1] = regs->r1;
2771 env->regs[2] = regs->r2;
2772 env->regs[3] = regs->r3;
2773 env->regs[4] = regs->r4;
2774 env->regs[5] = regs->r5;
2775 env->regs[6] = regs->r6;
2776 env->regs[7] = regs->r7;
2777 env->regs[8] = regs->r8;
2778 env->regs[9] = regs->r9;
2779 env->regs[10] = regs->r10;
2780 env->regs[11] = regs->r11;
2781 env->regs[12] = regs->r12;
2782 env->regs[13] = regs->r13;
2783 env->regs[14] = info->start_stack;
2784 env->regs[15] = regs->acr;
2785 env->pc = regs->erp;
2788 #error unsupported target CPU
2791 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2792 ts->stack_base = info->start_stack;
2793 ts->heap_base = info->brk;
2794 /* This will be filled in on the first SYS_HEAPINFO call. */
2799 gdbserver_start (gdbstub_port);
2800 gdb_handlesig(env, 0);