3 #define BIOS_FILENAME "mips_bios.bin"
4 //#define BIOS_FILENAME "system.bin"
5 #define KERNEL_LOAD_ADDR 0x80010000
6 #define INITRD_LOAD_ADDR 0x80800000
12 static void pic_irq_request(void *opaque, int level)
15 cpu_single_env->CP0_Cause |= 0x00000400;
16 cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
18 cpu_single_env->CP0_Cause &= ~0x00000400;
19 cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
23 void cpu_mips_irqctrl_init (void)
27 uint32_t cpu_mips_get_random (CPUState *env)
29 uint32_t now = qemu_get_clock(vm_clock);
31 return now % (MIPS_TLB_NB - env->CP0_Wired) + env->CP0_Wired;
35 uint32_t cpu_mips_get_count (CPUState *env)
37 return env->CP0_Count +
38 (uint32_t)muldiv64(qemu_get_clock(vm_clock),
39 100 * 1000 * 1000, ticks_per_sec);
42 static void cpu_mips_update_count (CPUState *env, uint32_t count,
51 now = qemu_get_clock(vm_clock);
52 next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
57 fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
58 __func__, now, count, compare, next - now);
61 /* Store new count and compare registers */
62 env->CP0_Compare = compare;
64 count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec);
66 qemu_mod_timer(env->timer, next);
69 void cpu_mips_store_count (CPUState *env, uint32_t value)
71 cpu_mips_update_count(env, value, env->CP0_Compare);
74 void cpu_mips_store_compare (CPUState *env, uint32_t value)
76 cpu_mips_update_count(env, cpu_mips_get_count(env), value);
77 cpu_single_env->CP0_Cause &= ~0x00008000;
78 cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
81 static void mips_timer_cb (void *opaque)
88 fprintf(logfile, "%s\n", __func__);
91 cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
92 cpu_single_env->CP0_Cause |= 0x00008000;
93 cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
96 void cpu_mips_clock_init (CPUState *env)
98 env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
100 cpu_mips_update_count(env, 1, 0);
103 static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
106 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
107 cpu_outb(NULL, addr & 0xffff, value);
110 static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
112 uint32_t ret = cpu_inb(NULL, addr & 0xffff);
114 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
118 static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
121 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
122 #ifdef TARGET_WORDS_BIGENDIAN
123 value = bswap16(value);
125 cpu_outw(NULL, addr & 0xffff, value);
128 static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
130 uint32_t ret = cpu_inw(NULL, addr & 0xffff);
131 #ifdef TARGET_WORDS_BIGENDIAN
135 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
139 static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
142 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
143 #ifdef TARGET_WORDS_BIGENDIAN
144 value = bswap32(value);
146 cpu_outl(NULL, addr & 0xffff, value);
149 static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
151 uint32_t ret = cpu_inl(NULL, addr & 0xffff);
153 #ifdef TARGET_WORDS_BIGENDIAN
157 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
161 CPUWriteMemoryFunc *io_write[] = {
167 CPUReadMemoryFunc *io_read[] = {
173 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
174 DisplayState *ds, const char **fd_filename, int snapshot,
175 const char *kernel_filename, const char *kernel_cmdline,
176 const char *initrd_filename)
179 target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
180 unsigned long bios_offset;
185 printf("%s: start\n", __func__);
186 linux_boot = (kernel_filename != NULL);
188 cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
189 bios_offset = ram_size + vga_ram_size;
190 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
191 printf("%s: load BIOS '%s' size %d\n", __func__, buf, BIOS_SIZE);
192 ret = load_image(buf, phys_ram_base + bios_offset);
193 if (ret != BIOS_SIZE) {
194 fprintf(stderr, "qemu: could not load MIPS bios '%s'\n", buf);
197 cpu_register_physical_memory((uint32_t)(0x1fc00000),
198 BIOS_SIZE, bios_offset | IO_MEM_ROM);
200 memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE);
201 cpu_single_env->PC = 0x80010004;
203 cpu_single_env->PC = 0xBFC00004;
206 kernel_base = KERNEL_LOAD_ADDR;
207 /* now we can load the kernel */
208 kernel_size = load_image(kernel_filename,
209 phys_ram_base + (kernel_base - 0x80000000));
210 if (kernel_size == (target_ulong) -1) {
211 fprintf(stderr, "qemu: could not load kernel '%s'\n",
216 if (initrd_filename) {
217 initrd_base = INITRD_LOAD_ADDR;
218 initrd_size = load_image(initrd_filename,
219 phys_ram_base + initrd_base);
220 if (initrd_size == (target_ulong) -1) {
221 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
229 cpu_single_env->PC = KERNEL_LOAD_ADDR;
237 /* Init internal devices */
238 cpu_mips_clock_init(cpu_single_env);
239 cpu_mips_irqctrl_init();
241 /* Register 64 KB of ISA IO space at 0x14000000 */
242 io_memory = cpu_register_io_memory(0, io_read, io_write, NULL);
243 cpu_register_physical_memory(0x14000000, 0x00010000, io_memory);
244 isa_mem_base = 0x10000000;
246 isa_pic = pic_init(pic_irq_request, cpu_single_env);
247 pit = pit_init(0x40, 0);
248 serial_init(0x3f8, 4, serial_hds[0]);
249 vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
252 isa_ne2000_init(0x300, 9, &nd_table[0]);
255 QEMUMachine mips_machine = {