2 * m68k micro operations
4 * Copyright (c) 2006-2007 CodeSourcery
5 * Written by Paul Brook
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include "m68k-qreg.h"
26 #define offsetof(type, field) ((size_t) &((type *)0)->field)
29 static long qreg_offsets[] = {
30 #define DEFO32(name, offset) offsetof(CPUState, offset),
31 #define DEFR(name, reg, mode) -1,
32 #define DEFF64(name, offset) offsetof(CPUState, offset),
37 #define CPU_FP_STATUS env->fp_status
39 #define RAISE_EXCEPTION(n) do { \
40 env->exception_index = n; \
44 #define get_op helper_get_op
45 #define set_op helper_set_op
46 #define get_opf64 helper_get_opf64
47 #define set_opf64 helper_set_opf64
51 if (qreg >= TARGET_NUM_QREGS) {
52 return env->qregs[qreg - TARGET_NUM_QREGS];
53 } else if (qreg == QREG_T0) {
56 return *(uint32_t *)(((long)env) + qreg_offsets[qreg]);
60 void set_op(int qreg, uint32_t val)
62 if (qreg >= TARGET_NUM_QREGS) {
63 env->qregs[qreg - TARGET_NUM_QREGS] = val;
64 } else if (qreg == QREG_T0) {
67 *(uint32_t *)(((long)env) + qreg_offsets[qreg]) = val;
71 float64 get_opf64(int qreg)
73 if (qreg < TARGET_NUM_QREGS) {
74 return *(float64 *)(((long)env) + qreg_offsets[qreg]);
76 return *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS];
80 void set_opf64(int qreg, float64 val)
82 if (qreg < TARGET_NUM_QREGS) {
83 *(float64 *)(((long)env) + qreg_offsets[qreg]) = val;
85 *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS] = val;
89 #define OP(name) void OPPROTO glue(op_,name) (void)
93 set_op(PARAM1, get_op(PARAM2));
99 set_op(PARAM1, PARAM2);
105 set_opf64(PARAM1, get_opf64(PARAM2));
111 set_opf64(PARAM1, float64_zero);
117 uint32_t op2 = get_op(PARAM2);
118 uint32_t op3 = get_op(PARAM3);
119 set_op(PARAM1, op2 + op3);
125 uint32_t op2 = get_op(PARAM2);
126 uint32_t op3 = get_op(PARAM3);
127 set_op(PARAM1, op2 - op3);
133 uint32_t op2 = get_op(PARAM2);
134 uint32_t op3 = get_op(PARAM3);
135 set_op(PARAM1, op2 * op3);
141 uint32_t arg = get_op(PARAM2);
142 set_op(PARAM1, ~arg);
148 uint32_t arg = get_op(PARAM2);
149 set_op(PARAM1, -arg);
155 uint32_t arg = get_op(PARAM2);
156 arg = (arg >> 24) | (arg << 24)
157 | ((arg >> 16) & 0xff00) | ((arg << 16) & 0xff0000);
164 uint32_t op1 = get_op(PARAM1);
165 uint32_t op2 = get_op(PARAM2);
167 env->cc_dest &= ~CCF_Z;
169 env->cc_dest |= CCF_Z;
175 uint32_t arg = get_op(PARAM2);
177 for (n = 32; arg; n--)
185 uint32_t op1 = get_op(PARAM1);
186 uint32_t op2 = get_op(PARAM2);
189 env->cc_x = (op1 <= op2);
190 env->cc_op = CC_OP_SUBX;
191 res = op1 - (op2 + 1);
193 env->cc_x = (op1 < op2);
194 env->cc_op = CC_OP_SUB;
203 uint32_t op1 = get_op(PARAM1);
204 uint32_t op2 = get_op(PARAM2);
208 env->cc_x = (res <= op2);
209 env->cc_op = CC_OP_ADDX;
212 env->cc_x = (res < op2);
213 env->cc_op = CC_OP_ADD;
223 uint32_t op2 = get_op(PARAM2);
224 uint32_t op3 = get_op(PARAM3);
225 set_op(PARAM1, op2 & op3);
231 uint32_t op2 = get_op(PARAM2);
232 uint32_t op3 = get_op(PARAM3);
233 set_op(PARAM1, op2 | op3);
239 uint32_t op2 = get_op(PARAM2);
240 uint32_t op3 = get_op(PARAM3);
241 set_op(PARAM1, op2 ^ op3);
248 uint32_t op2 = get_op(PARAM2);
249 uint32_t op3 = get_op(PARAM3);
252 set_op(PARAM1, result);
258 uint32_t op1 = get_op(PARAM1);
259 uint32_t op2 = get_op(PARAM2);
262 set_op(PARAM1, result);
263 env->cc_x = (op1 << (op2 - 1)) & 1;
269 uint32_t op2 = get_op(PARAM2);
270 uint32_t op3 = get_op(PARAM3);
273 set_op(PARAM1, result);
279 uint32_t op1 = get_op(PARAM1);
280 uint32_t op2 = get_op(PARAM2);
283 set_op(PARAM1, result);
284 env->cc_x = (op1 >> (op2 - 1)) & 1;
290 int32_t op2 = get_op(PARAM2);
291 uint32_t op3 = get_op(PARAM3);
294 set_op(PARAM1, result);
300 int32_t op1 = get_op(PARAM1);
301 uint32_t op2 = get_op(PARAM2);
304 set_op(PARAM1, result);
305 env->cc_x = (op1 >> (op2 - 1)) & 1;
313 uint32_t op2 = get_op(PARAM2);
314 set_op(PARAM1, (uint8_t)op2);
320 uint32_t op2 = get_op(PARAM2);
321 set_op(PARAM1, (int8_t)op2);
327 uint32_t op2 = get_op(PARAM2);
328 set_op(PARAM1, (uint16_t)op2);
334 uint32_t op2 = get_op(PARAM2);
335 set_op(PARAM1, (int16_t)op2);
341 cpu_m68k_flush_flags(env, env->cc_op);
355 /* ??? This needs to make sure the throwing location is accurate. */
357 RAISE_EXCEPTION(EXCP_DIV0);
361 /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses
362 the address of a symbol, and gcc knows symbols can't have address
364 if (PARAM1 == 2 && quot > 0xffff)
368 else if ((int32_t)quot < 0)
372 env->cc_dest = flags;
387 RAISE_EXCEPTION(EXCP_DIV0);
391 if (PARAM1 == 2 && quot != (int16_t)quot)
399 env->cc_dest = flags;
403 /* Halt is special because it may be a semihosting call. */
406 RAISE_EXCEPTION(EXCP_HALT_INSN);
413 RAISE_EXCEPTION(EXCP_HLT);
419 RAISE_EXCEPTION(PARAM1);
423 /* Floating point comparison sets flags differently to other instructions. */
429 src0 = get_opf64(PARAM2);
430 src1 = get_opf64(PARAM3);
431 set_opf64(PARAM1, helper_sub_cmpf64(env, src0, src1));
437 uint32_t op1 = get_op(PARAM1);
444 uint32_t op1 = get_op(PARAM1);
445 uint32_t op2 = get_op(PARAM2);
446 env->cc_x = (op1 < op2);
452 set_op(PARAM1, env->cc_x);
458 uint32_t op1 = get_op(PARAM1);
465 uint32_t op1 = get_op(PARAM1);
466 uint32_t op2 = get_op(PARAM2);
474 env->fp_result = get_opf64(PARAM1);
480 env->sr = get_op(PARAM1) & 0xffff;
492 uint32_t arg = get_op(PARAM1);
499 uint32_t arg = get_op(PARAM1);
506 int32_t arg = get_op(PARAM1);
513 int32_t arg = get_op(PARAM1);
525 /* Floating point. */
528 set_op(PARAM1, float64_to_int32(get_opf64(PARAM2), &CPU_FP_STATUS));
538 u.f = float64_to_float32(get_opf64(PARAM2), &CPU_FP_STATUS);
545 set_opf64(PARAM1, int32_to_float64(get_op(PARAM2), &CPU_FP_STATUS));
555 u.i = get_op(PARAM2);
556 set_opf64(PARAM1, float32_to_float64(u.f, &CPU_FP_STATUS));
562 float64 op0 = get_opf64(PARAM2);
563 set_opf64(PARAM1, float64_abs(op0));
569 float64 op0 = get_opf64(PARAM2);
570 set_opf64(PARAM1, float64_chs(op0));
576 float64 op0 = get_opf64(PARAM2);
577 set_opf64(PARAM1, float64_sqrt(op0, &CPU_FP_STATUS));
583 float64 op0 = get_opf64(PARAM2);
584 float64 op1 = get_opf64(PARAM3);
585 set_opf64(PARAM1, float64_add(op0, op1, &CPU_FP_STATUS));
591 float64 op0 = get_opf64(PARAM2);
592 float64 op1 = get_opf64(PARAM3);
593 set_opf64(PARAM1, float64_sub(op0, op1, &CPU_FP_STATUS));
599 float64 op0 = get_opf64(PARAM2);
600 float64 op1 = get_opf64(PARAM3);
601 set_opf64(PARAM1, float64_mul(op0, op1, &CPU_FP_STATUS));
607 float64 op0 = get_opf64(PARAM2);
608 float64 op1 = get_opf64(PARAM3);
609 set_opf64(PARAM1, float64_div(op0, op1, &CPU_FP_STATUS));
615 float64 op0 = get_opf64(PARAM2);
616 set_opf64(PARAM1, float64_round_to_int(op0, &CPU_FP_STATUS));
622 float64 op0 = get_opf64(PARAM2);
623 set_opf64(PARAM1, float64_trunc_to_int(op0, &CPU_FP_STATUS));
629 float64 op0 = get_opf64(PARAM2);
630 float64 op1 = get_opf64(PARAM3);
631 set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS));
637 int op1 = get_op(PARAM1);
638 uint32_t op2 = get_op(PARAM2);
639 helper_movec(env, op1, op2);
644 #define MEMSUFFIX _raw
647 #if !defined(CONFIG_USER_ONLY)
648 #define MEMSUFFIX _user
650 #define MEMSUFFIX _kernel
655 /* TODO: The MAC instructions use 64-bit arithmetic fairly extensively.
656 This results in fairly large ops (and sometimes other issues) on 32-bit
657 hosts. Maybe move most of them into helpers. */
660 uint32_t op1 = get_op(PARAM1);
661 uint32_t op2 = get_op(PARAM2);
665 product = (uint64_t)op1 * op2;
666 res = (product << 24) >> 24;
667 if (res != product) {
668 env->macsr |= MACSR_V;
669 if (env->macsr & MACSR_OMC) {
670 /* Make sure the accumulate operation overflows. */
683 uint32_t op1 = get_op(PARAM1);
684 uint32_t op2 = get_op(PARAM2);
687 product = (uint64_t)op1 * op2;
688 if (product & (0xffffffull << 40)) {
689 env->macsr |= MACSR_V;
690 if (env->macsr & MACSR_OMC) {
691 /* Make sure the accumulate operation overflows. */
694 product &= ((1ull << 40) - 1);
697 env->mactmp = product;
703 int32_t op1 = get_op(PARAM1);
704 int32_t op2 = get_op(PARAM2);
708 product = (uint64_t)op1 * op2;
709 if (env->macsr & MACSR_RT) {
710 remainder = product & 0xffffff;
712 if (remainder > 0x800000)
714 else if (remainder == 0x800000)
715 product += (product & 1);
719 env->mactmp = product;
736 env->macc[acc] += env->mactmp;
743 env->macc[acc] -= env->mactmp;
753 sum = env->macc[acc];
754 result = (sum << 16) >> 16;
756 env->macsr |= MACSR_V;
758 if (env->macsr & MACSR_V) {
759 env->macsr |= MACSR_PAV0 << acc;
760 if (env->macsr & MACSR_OMC) {
761 /* The result is saturated to 32 bits, despite overflow occuring
762 at 48 bits. Seems weird, but that's what the hardware docs
764 result = (result >> 63) ^ 0x7fffffff;
767 env->macc[acc] = result;
776 sum = env->macc[acc];
777 if (sum & (0xffffull << 48)) {
778 env->macsr |= MACSR_V;
780 if (env->macsr & MACSR_V) {
781 env->macsr |= MACSR_PAV0 << acc;
782 if (env->macsr & MACSR_OMC) {
783 if (sum > (1ull << 53))
786 sum = (1ull << 48) - 1;
788 sum &= ((1ull << 48) - 1);
800 sum = env->macc[acc];
801 result = (sum << 16) >> 16;
803 env->macsr |= MACSR_V;
805 if (env->macsr & MACSR_V) {
806 env->macsr |= MACSR_PAV0 << acc;
807 if (env->macsr & MACSR_OMC) {
808 result = (result >> 63) ^ 0x7fffffffffffll;
811 env->macc[acc] = result;
817 env->macsr &= ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV);
824 val = env->macc[acc];
826 env->macsr |= MACSR_Z;
827 else if (val & (1ull << 47));
828 env->macsr |= MACSR_N;
829 if (env->macsr & (MACSR_PAV0 << acc)) {
830 env->macsr |= MACSR_V;
832 if (env->macsr & MACSR_FI) {
833 val = ((int64_t)val) >> 40;
834 if (val != 0 && val != -1)
835 env->macsr |= MACSR_EV;
836 } else if (env->macsr & MACSR_SU) {
837 val = ((int64_t)val) >> 32;
838 if (val != 0 && val != -1)
839 env->macsr |= MACSR_EV;
841 if ((val >> 32) != 0)
842 env->macsr |= MACSR_EV;
854 val = env->macc[acc];
855 if (env->macsr & MACSR_SU) {
856 /* 16-bit rounding. */
857 rem = val & 0xffffff;
858 val = (val >> 24) & 0xffffu;
861 else if (rem == 0x800000)
863 } else if (env->macsr & MACSR_RT) {
864 /* 32-bit rounding. */
869 else if (rem == 0x80)
875 if (env->macsr & MACSR_OMC) {
877 if (env->macsr & MACSR_SU) {
878 if (val != (uint16_t) val) {
879 result = ((val >> 63) ^ 0x7fff) & 0xffff;
881 result = val & 0xffff;
884 if (val != (uint32_t)val) {
885 result = ((uint32_t)(val >> 63) & 0x7fffffff);
887 result = (uint32_t)val;
892 if (env->macsr & MACSR_SU) {
893 result = val & 0xffff;
895 result = (uint32_t)val;
898 set_op(PARAM1, result);
905 set_op(PARAM1, (uint32_t)env->macc[acc]);
912 int64_t val = env->macc[acc];
914 if (val == (int32_t)val) {
915 result = (int32_t)val;
917 result = (val >> 61) ^ 0x7fffffff;
919 set_op(PARAM1, result);
926 uint64_t val = env->macc[acc];
928 if ((val >> 32) == 0) {
929 result = (uint32_t)val;
931 result = 0xffffffffu;
933 set_op(PARAM1, result);
942 env->macsr &= ~(MACSR_PAV0 << acc);
951 env->macc[dest] = env->macc[src];
952 mask = MACSR_PAV0 << dest;
953 if (env->macsr & (MACSR_PAV0 << src))
964 val = env->macc[acc] & 0x00ff;
965 val = (env->macc[acc] >> 32) & 0xff00;
966 val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
967 val |= (env->macc[acc + 1] >> 16) & 0xff000000;
976 val = (env->macc[acc] >> 32) & 0xffff;
977 val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
985 int32_t val = get_op(PARAM1);
986 env->macc[acc] = ((int64_t)val) << 8;
987 env->macsr &= ~(MACSR_PAV0 << acc);
994 int32_t val = get_op(PARAM1);
995 env->macc[acc] = val;
996 env->macsr &= ~(MACSR_PAV0 << acc);
1003 uint32_t val = get_op(PARAM1);
1004 env->macc[acc] = val;
1005 env->macsr &= ~(MACSR_PAV0 << acc);
1012 int32_t val = get_op(PARAM1);
1015 res = env->macc[acc] & 0xffffffff00ull;
1016 tmp = (int16_t)(val & 0xff00);
1017 res |= ((int64_t)tmp) << 32;
1019 env->macc[acc] = res;
1020 res = env->macc[acc + 1] & 0xffffffff00ull;
1021 tmp = (val & 0xff000000);
1022 res |= ((int64_t)tmp) << 16;
1023 res |= (val >> 16) & 0xff;
1024 env->macc[acc + 1] = res;
1030 int32_t val = get_op(PARAM1);
1033 res = (uint32_t)env->macc[acc];
1035 res |= ((int64_t)tmp) << 32;
1036 env->macc[acc] = res;
1037 res = (uint32_t)env->macc[acc + 1];
1038 tmp = val & 0xffff0000;
1039 res |= (int64_t)tmp << 16;
1040 env->macc[acc + 1] = res;
1046 int32_t val = get_op(PARAM1);
1048 res = (uint32_t)env->macc[acc];
1049 res |= ((uint64_t)(val & 0xffff)) << 32;
1050 env->macc[acc] = res;
1051 res = (uint32_t)env->macc[acc + 1];
1052 res |= (uint64_t)(val & 0xffff0000) << 16;
1053 env->macc[acc + 1] = res;
1058 m68k_set_macsr(env, get_op(PARAM1));