target-mips: implement FPU Flush-To-Zero mode

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6914 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 0162ac1..b28ee93 100644 (file)
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1879,6 +1879,9 @@ unsigned int ieee_rm[] = {
 #define RESTORE_ROUNDING_MODE \
     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
 
+#define RESTORE_FLUSH_MODE \
+    set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0, &env->active_fpu.fp_status);
+
 target_ulong helper_cfc1 (uint32_t reg)
 {
     target_ulong t0;
@@ -1934,6 +1937,8 @@ void helper_ctc1 (target_ulong t0, uint32_t reg)
     }
     /* set rounding mode */
     RESTORE_ROUNDING_MODE;
+    /* set flush-to-zero mode */
+    RESTORE_FLUSH_MODE;
     set_float_exception_flags(0, &env->active_fpu.fp_status);
     if ((GET_FP_ENABLE(env->active_fpu.fcr31) | 0x20) & GET_FP_CAUSE(env->active_fpu.fcr31))
         helper_raise_exception(EXCP_FPE);