tcg_temp_local_new should take no parameter

This patch removes useless type information in some calls to
tcg_temp_local_new.  It also removes the parameter from the
macro declaration;  if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6146 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 80a08b1..72df569 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx)                      \
     TCGv_i32 t0 = tcg_temp_local_new_i32();                                   \
     TCGv_i32 t1 = tcg_temp_local_new_i32();                                   \
     TCGv_i32 t2 = tcg_temp_local_new_i32();                                   \
-    TCGv_i64 t3 = tcg_temp_local_new(TCG_TYPE_I64);                           \
+    TCGv_i64 t3 = tcg_temp_local_new();                                       \
     tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]);                      \
     tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]);                      \
     tcg_op(t0, t0, t2);                                                       \

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index ac67fc8..73134f0 100644 (file)
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -785,8 +785,8 @@ static void _decode_opc(DisasContext * ctx)
        {
            int label1 = gen_new_label();
            int label2 = gen_new_label();
-           TCGv cmp1 = tcg_temp_local_new(TCG_TYPE_I32);
-           TCGv cmp2 = tcg_temp_local_new(TCG_TYPE_I32);
+           TCGv cmp1 = tcg_temp_local_new();
+           TCGv cmp2 = tcg_temp_local_new();
            tcg_gen_xor_i32(cmp1, REG(B7_4), REG(B11_8));
            tcg_gen_andi_i32(cmp2, cmp1, 0xff000000);
            tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);
@@ -935,7 +935,7 @@ static void _decode_opc(DisasContext * ctx)
            int label2 = gen_new_label();
            int label3 = gen_new_label();
            int label4 = gen_new_label();
-           TCGv shift = tcg_temp_local_new(TCG_TYPE_I32);
+           TCGv shift = tcg_temp_local_new();
            tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
            /* Rm positive, shift to the left */
            tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -966,7 +966,7 @@ static void _decode_opc(DisasContext * ctx)
            int label1 = gen_new_label();
            int label2 = gen_new_label();
            int label3 = gen_new_label();
-           TCGv shift = tcg_temp_local_new(TCG_TYPE_I32);
+           TCGv shift = tcg_temp_local_new();
            tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
            /* Rm positive, shift to the left */
            tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -1645,9 +1645,9 @@ static void _decode_opc(DisasContext * ctx)
     case 0x401b:               /* tas.b @Rn */
        {
            TCGv addr, val;
-           addr = tcg_temp_local_new(TCG_TYPE_I32);
+           addr = tcg_temp_local_new();
            tcg_gen_mov_i32(addr, REG(B11_8));
-           val = tcg_temp_local_new(TCG_TYPE_I32);
+           val = tcg_temp_local_new();
            tcg_gen_qemu_ld8u(val, addr, ctx->memidx);
            gen_cmp_imm(TCG_COND_EQ, val, 0);
            tcg_gen_ori_i32(val, val, 0x80);

diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 5432ac1..b1d4e25 100644 (file)
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1693,7 +1693,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 #define tcg_temp_new() tcg_temp_new_i32()
 #define tcg_global_reg_new tcg_global_reg_new_i32
 #define tcg_global_mem_new tcg_global_mem_new_i32
-#define tcg_temp_local_new(t) tcg_temp_local_new_i32()
+#define tcg_temp_local_new() tcg_temp_local_new_i32()
 #define tcg_temp_free tcg_temp_free_i32
 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
@@ -1704,7 +1704,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 #define tcg_temp_new() tcg_temp_new_i64()
 #define tcg_global_reg_new tcg_global_reg_new_i64
 #define tcg_global_mem_new tcg_global_mem_new_i64
-#define tcg_temp_local_new(t) tcg_temp_local_new_i64()
+#define tcg_temp_local_new() tcg_temp_local_new_i64()
 #define tcg_temp_free tcg_temp_free_i64
 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64