+ case 'M':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg |= MUSB_TEST_FORCE_HOST;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ }
+ break;
+
+ case 'm':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg &= ~MUSB_TEST_FORCE_HOST;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ MUSB_DEV_MODE(musb);
+ musb->xceiv->state = OTG_STATE_B_IDLE;
+ }
+ break;
+
+ case 'L':
+ musb->xceiv->state = OTG_STATE_A_HOST;
+ MUSB_HST_MODE(musb);
+ break;
+
+ case 'l':
+ musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
+ MUSB_HST_MODE(musb);
+ break;
+
+ case 'J':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg |= MUSB_TEST_FORCE_HS;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ }
+ break;
+
+ case 'j':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg &= ~MUSB_TEST_FORCE_HS;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ }
+ break;
+
+ case 'K':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg |= MUSB_TEST_FORCE_FS;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ }
+ break;
+
+ case 'k':
+ if (mbase) {
+ reg = musb_readb(mbase, MUSB_TESTMODE);
+ reg &= ~MUSB_TEST_FORCE_FS;
+ musb_writeb(mbase, MUSB_TESTMODE, reg);
+ }
+ break;
+
+ case 'X':
+ if (mbase)
+ musb_force_term(mbase,MUSB_TERM_HOST_HIGHSPEED);
+ break;
+
+ case 'Y':
+ if (mbase)
+ musb_force_term(mbase,MUSB_TERM_HOST_FULLSPEED);
+ break;
+
+ case 'Z':
+ if (mbase)
+ musb_force_term(mbase,MUSB_TERM_HOST_LOWSPEED);
+ break;
+
+ case 'R':
+ musb_port_reset(musb, true);
+ while (time_before(jiffies, musb->rh_timer))
+ msleep(1);
+ musb_port_reset(musb, false);
+
+ break;
+
+ case 'r':
+ usb_hcd_resume_root_hub(hcd);
+ break;
+
+ case 'e':
+ if(bus)
+ usb_bus_start_enum(bus,bus->otg_port);
+ break;
+
+ case 'U':
+ /*Suspend*/
+ musb_port_suspend(musb, true);
+ break;
+
+ case 'u':
+ /*Resume*/
+ musb_port_suspend(musb, false);
+ /*How to end sanely? */
+ musb_port_reset(musb, true);
+ while (time_before(jiffies, musb->rh_timer))
+ msleep(1);
+ musb_port_reset(musb, false);
+
+ break;
+